arm: zynq: timer: Remove unnecessary register write
Acknowedging an interrupt requires to read the interrupt register only. The write was only required to work around a bug in the QEMU implementation of the TTC, which is fixed. Signed-off-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Acked-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com> Tested-by: Josh Cartwright <josh.cartwright@ni.com>
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@ -121,8 +121,7 @@ static irqreturn_t xttcps_clock_event_interrupt(int irq, void *dev_id)
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struct xttcps_timer *timer = &xttce->xttc;
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/* Acknowledge the interrupt and call event handler */
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__raw_writel(__raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET),
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timer->base_addr + XTTCPS_ISR_OFFSET);
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__raw_readl(timer->base_addr + XTTCPS_ISR_OFFSET);
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xttce->ce.event_handler(&xttce->ce);
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