x86/amd_nb: Get DF ID from F5 device for Hygon family 18h model 6h
The DF ID should be get from DF F5 device for Hygon family 18h
model 6h processor.
Fixes: 3e980dd8
("x86/amd_nb: Add support for Hygon family 18h model 6h")
Signed-off-by: fuhao <fuh@hygon.cn>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: Bin Lai <robinlai@tencent.com>
Signed-off-by: Jinliang Zheng <alexjlzheng@tencent.com>
Reviewed-by: caelli <caelli@tencent.com>
Signed-off-by: Jianping Liu <frankjpliu@tencent.com>
This commit is contained in:
parent
6aaeaee473
commit
af62cfaf8b
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@ -32,6 +32,7 @@
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#define PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1 0x1491
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#define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1 0x14b1
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#define PCI_DEVICE_ID_HYGON_18H_M05H_DF_F4 0x14b4
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#define PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5 0x14b5
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/* Protect the PCI config register pairs used for SMN and DF indirect access. */
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static DEFINE_MUTEX(smn_mutex);
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@ -48,7 +49,6 @@ static const struct pci_device_id amd_root_ids[] = {
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{}
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};
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#define PCI_DEVICE_ID_AMD_CNB17H_F4 0x1704
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const struct pci_device_id amd_nb_misc_ids[] = {
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@ -261,43 +261,55 @@ u16 hygon_nb_num(void)
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}
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EXPORT_SYMBOL_GPL(hygon_nb_num);
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static int get_df1_register(struct pci_dev *misc, int offset, u32 *value)
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static int get_df_register(struct pci_dev *misc, u8 func, int offset, u32 *value)
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{
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struct pci_dev *df_f1 = NULL;
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struct pci_dev *df_func = NULL;
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u32 device;
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int err;
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switch (boot_cpu_data.x86_model) {
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case 0x4:
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device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1;
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break;
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case 0x5:
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if (misc->device == PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3)
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device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1;
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else
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if (func == 1) {
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switch (boot_cpu_data.x86_model) {
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case 0x4:
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device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1;
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break;
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case 0x6:
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device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1;
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break;
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default:
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break;
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case 0x5:
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if (misc->device == PCI_DEVICE_ID_HYGON_18H_M05H_DF_F3)
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device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1;
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else
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device = PCI_DEVICE_ID_HYGON_18H_M04H_DF_F1;
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break;
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case 0x6:
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device = PCI_DEVICE_ID_HYGON_18H_M05H_DF_F1;
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break;
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default:
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return -ENODEV;
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}
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} else if (func == 5) {
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switch (boot_cpu_data.x86_model) {
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case 0x6:
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device = PCI_DEVICE_ID_HYGON_18H_M06H_DF_F5;
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break;
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default:
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return -ENODEV;
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}
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} else {
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return -ENODEV;
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}
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while ((df_f1 = pci_get_device(misc->vendor, device, df_f1)))
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if (pci_domain_nr(df_f1->bus) == pci_domain_nr(misc->bus) &&
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df_f1->bus->number == misc->bus->number &&
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PCI_SLOT(df_f1->devfn) == PCI_SLOT(misc->devfn))
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while ((df_func = pci_get_device(misc->vendor, device, df_func)))
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if (pci_domain_nr(df_func->bus) == pci_domain_nr(misc->bus) &&
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df_func->bus->number == misc->bus->number &&
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PCI_SLOT(df_func->devfn) == PCI_SLOT(misc->devfn))
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break;
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if (!df_f1) {
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pr_warn("Error getting DF F1 device.\n");
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if (!df_func) {
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pr_warn("Error getting DF F%d device.\n", func);
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return -ENODEV;
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}
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err = pci_read_config_dword(df_f1, offset, value);
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err = pci_read_config_dword(df_func, offset, value);
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if (err)
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pr_warn("Error reading DF F1 register.\n");
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pr_warn("Error reading DF F%d register.\n", func);
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return err;
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}
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@ -307,9 +319,15 @@ int get_df_id(struct pci_dev *misc, u8 *id)
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u32 value;
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int ret;
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/* F1x200[23:20]: DF ID */
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ret = get_df1_register(misc, 0x200, &value);
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*id = (value >> 20) & 0xf;
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if (boot_cpu_data.x86_model == 0x6) {
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/* F5x180[19:16]: DF ID */
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ret = get_df_register(misc, 5, 0x180, &value);
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*id = (value >> 16) & 0xf;
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} else {
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/* F1x200[23:20]: DF ID */
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ret = get_df_register(misc, 1, 0x200, &value);
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*id = (value >> 20) & 0xf;
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}
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return ret;
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}
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@ -321,7 +339,7 @@ static u8 get_socket_num(struct pci_dev *misc)
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int ret;
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/* F1x200[7:0]: Which socket is present. */
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ret = get_df1_register(misc, 0x200, &value);
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ret = get_df_register(misc, 1, 0x200, &value);
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return ret ? 0 : hweight8(value & 0xff);
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}
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