[media] v4l: omap4iss: Enable/disabling the ISP interrupts globally
ISP interrupts are enabled/disabled when starting/stopping the IPIPEIF or resizer. This doesn't permit using the two modules in separate pipelines. Fix it by enabling/disabling the ISP interrupts at the same time as the ISS interrupts, in the ISS device get/put operations. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mauro Carvalho Chehab <m.chehab@samsung.com>
This commit is contained in:
parent
6016498f2b
commit
af15d025ec
|
@ -66,34 +66,11 @@ void omap4iss_flush(struct iss_device *iss)
|
|||
iss_reg_read(iss, OMAP4_ISS_MEM_TOP, ISS_HL_REVISION);
|
||||
}
|
||||
|
||||
/*
|
||||
* iss_enable_interrupts - Enable ISS interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
static void iss_enable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
static const u32 hl_irq = ISS_HL_IRQ_CSIA | ISS_HL_IRQ_CSIB | ISS_HL_IRQ_ISP(0);
|
||||
|
||||
/* Enable HL interrupts */
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5), hl_irq);
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_SET(5), hl_irq);
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* iss_disable_interrupts - Disable ISS interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
static void iss_disable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_CLR(5), -1);
|
||||
}
|
||||
|
||||
/*
|
||||
* iss_isp_enable_interrupts - Enable ISS ISP interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
void omap4iss_isp_enable_interrupts(struct iss_device *iss)
|
||||
static void omap4iss_isp_enable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
static const u32 isp_irq = ISP5_IRQ_OCP_ERR |
|
||||
ISP5_IRQ_RSZ_FIFO_IN_BLK_ERR |
|
||||
|
@ -111,9 +88,38 @@ void omap4iss_isp_enable_interrupts(struct iss_device *iss)
|
|||
* iss_isp_disable_interrupts - Disable ISS interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
void omap4iss_isp_disable_interrupts(struct iss_device *iss)
|
||||
static void omap4iss_isp_disable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_CLR(0), -1);
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_SYS1, ISP5_IRQENABLE_CLR(0), ~0);
|
||||
}
|
||||
|
||||
/*
|
||||
* iss_enable_interrupts - Enable ISS interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
static void iss_enable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
static const u32 hl_irq = ISS_HL_IRQ_CSIA | ISS_HL_IRQ_CSIB
|
||||
| ISS_HL_IRQ_ISP(0);
|
||||
|
||||
/* Enable HL interrupts */
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQSTATUS(5), hl_irq);
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_SET(5), hl_irq);
|
||||
|
||||
if (iss->regs[OMAP4_ISS_MEM_ISP_SYS1])
|
||||
omap4iss_isp_enable_interrupts(iss);
|
||||
}
|
||||
|
||||
/*
|
||||
* iss_disable_interrupts - Disable ISS interrupts.
|
||||
* @iss: OMAP4 ISS device
|
||||
*/
|
||||
static void iss_disable_interrupts(struct iss_device *iss)
|
||||
{
|
||||
if (iss->regs[OMAP4_ISS_MEM_ISP_SYS1])
|
||||
omap4iss_isp_disable_interrupts(iss);
|
||||
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_TOP, ISS_HL_IRQENABLE_CLR(5), ~0);
|
||||
}
|
||||
|
||||
int omap4iss_get_external_info(struct iss_pipeline *pipe,
|
||||
|
|
|
@ -141,9 +141,6 @@ void omap4iss_isp_subclk_enable(struct iss_device *iss,
|
|||
void omap4iss_isp_subclk_disable(struct iss_device *iss,
|
||||
enum iss_isp_subclk_resource res);
|
||||
|
||||
void omap4iss_isp_enable_interrupts(struct iss_device *iss);
|
||||
void omap4iss_isp_disable_interrupts(struct iss_device *iss);
|
||||
|
||||
int omap4iss_pipeline_pm_use(struct media_entity *entity, int use);
|
||||
|
||||
int omap4iss_register_entities(struct platform_device *pdev,
|
||||
|
|
|
@ -116,8 +116,6 @@ static void ipipe_configure(struct iss_ipipe_device *ipipe)
|
|||
/* IPIPE_PAD_SOURCE_VP */
|
||||
format = &ipipe->formats[IPIPE_PAD_SOURCE_VP];
|
||||
/* Do nothing? */
|
||||
|
||||
omap4iss_isp_enable_interrupts(iss);
|
||||
}
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
|
@ -169,7 +167,6 @@ static int ipipe_set_stream(struct v4l2_subdev *sd, int enable)
|
|||
ret = -ETIMEDOUT;
|
||||
|
||||
ipipe_enable(ipipe, 0);
|
||||
omap4iss_isp_disable_interrupts(iss);
|
||||
omap4iss_isp_subclk_disable(iss, OMAP4_ISS_ISP_SUBCLK_IPIPE);
|
||||
break;
|
||||
}
|
||||
|
|
|
@ -213,8 +213,6 @@ cont_raw:
|
|||
|
||||
/* IPIPEIF_PAD_SOURCE_VP */
|
||||
/* Do nothing? */
|
||||
|
||||
omap4iss_isp_enable_interrupts(iss);
|
||||
}
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
|
@ -368,7 +366,6 @@ static int ipipeif_set_stream(struct v4l2_subdev *sd, int enable)
|
|||
if (ipipeif->output & IPIPEIF_OUTPUT_MEMORY)
|
||||
ipipeif_write_enable(ipipeif, 0);
|
||||
ipipeif_enable(ipipeif, 0);
|
||||
omap4iss_isp_disable_interrupts(iss);
|
||||
omap4iss_isp_subclk_disable(iss, IPIPEIF_DRV_SUBCLK_MASK);
|
||||
iss_video_dmaqueue_flags_clr(video_out);
|
||||
break;
|
||||
|
|
|
@ -256,8 +256,6 @@ static void resizer_configure(struct iss_resizer_device *resizer)
|
|||
} else {
|
||||
iss_reg_write(iss, OMAP4_ISS_MEM_ISP_RESIZER, RZA_420, 0);
|
||||
}
|
||||
|
||||
omap4iss_isp_enable_interrupts(iss);
|
||||
}
|
||||
|
||||
/* -----------------------------------------------------------------------------
|
||||
|
@ -419,7 +417,6 @@ static int resizer_set_stream(struct v4l2_subdev *sd, int enable)
|
|||
ret = -ETIMEDOUT;
|
||||
|
||||
resizer_enable(resizer, 0);
|
||||
omap4iss_isp_disable_interrupts(iss);
|
||||
iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_SYSCONFIG,
|
||||
RSZ_SYSCONFIG_RSZA_CLK_EN);
|
||||
iss_reg_clr(iss, OMAP4_ISS_MEM_ISP_RESIZER, RSZ_GCK_SDR,
|
||||
|
|
Loading…
Reference in New Issue