spi: spi-fsl-spi: automatically adapt bits-per-word in cpu mode
Taking one interrupt for every byte is rather slow. Since the controller is perfectly capable of transmitting 32 bits at a time, change t->bits_per-word to 32 when the length is divisible by 4 and large enough that the reduced number of interrupts easily compensates for the one or two extra fsl_spi_setup_transfer() calls this causes. Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk> Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -363,12 +363,28 @@ static int fsl_spi_bufs(struct spi_device *spi, struct spi_transfer *t,
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static int fsl_spi_do_one_msg(struct spi_master *master,
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struct spi_message *m)
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{
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struct mpc8xxx_spi *mpc8xxx_spi = spi_master_get_devdata(master);
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struct spi_device *spi = m->spi;
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struct spi_transfer *t, *first;
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unsigned int cs_change;
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const int nsecs = 50;
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int status, last_bpw;
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/*
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* In CPU mode, optimize large byte transfers to use larger
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* bits_per_word values to reduce number of interrupts taken.
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*/
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if (!(mpc8xxx_spi->flags & SPI_CPM_MODE)) {
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list_for_each_entry(t, &m->transfers, transfer_list) {
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if (t->len < 256 || t->bits_per_word != 8)
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continue;
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if ((t->len & 3) == 0)
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t->bits_per_word = 32;
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else if ((t->len & 1) == 0)
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t->bits_per_word = 16;
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}
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}
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/* Don't allow changes if CS is active */
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cs_change = 1;
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list_for_each_entry(t, &m->transfers, transfer_list) {
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