drm/nouveau: run perflvl and M table scripts on mem clock change
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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5c6dc65754
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@ -385,6 +385,8 @@ struct nouveau_pm_level {
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u8 voltage;
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u8 fanspeed;
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u16 memscript;
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};
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struct nouveau_pm_temp_sensor_constants {
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@ -160,6 +160,7 @@ nouveau_perf_init(struct drm_device *dev)
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perflvl->memory = ROM16(entry[12]) * 1000;
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break;
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case 0x30:
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perflvl->memscript = ROM16(entry[2]);
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case 0x35:
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perflvl->fanspeed = entry[6];
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perflvl->voltage = entry[7];
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@ -24,6 +24,7 @@
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_bios.h"
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#include "nouveau_pm.h"
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/*XXX: boards using limits 0x40 need fixing, the register layout
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@ -33,6 +34,7 @@
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*/
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struct nv50_pm_state {
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struct nouveau_pm_level *perflvl;
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struct pll_lims pll;
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enum pll_types type;
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int N, M, P;
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@ -77,6 +79,7 @@ nv50_pm_clock_pre(struct drm_device *dev, struct nouveau_pm_level *perflvl,
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if (!state)
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return ERR_PTR(-ENOMEM);
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state->type = id;
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state->perflvl = perflvl;
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ret = get_pll_limits(dev, id, &state->pll);
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if (ret < 0) {
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@ -98,11 +101,30 @@ void
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nv50_pm_clock_set(struct drm_device *dev, void *pre_state)
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{
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struct nv50_pm_state *state = pre_state;
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struct nouveau_pm_level *perflvl = state->perflvl;
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u32 reg = state->pll.reg, tmp;
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struct bit_entry BIT_M;
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u16 script;
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int N = state->N;
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int M = state->M;
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int P = state->P;
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if (state->type == PLL_MEMORY && perflvl->memscript &&
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bit_table(dev, 'M', &BIT_M) == 0 &&
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BIT_M.version == 1 && BIT_M.length >= 0x0b) {
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script = ROM16(BIT_M.data[0x05]);
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if (script)
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nouveau_bios_run_init_table(dev, script, NULL);
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script = ROM16(BIT_M.data[0x07]);
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if (script)
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nouveau_bios_run_init_table(dev, script, NULL);
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script = ROM16(BIT_M.data[0x09]);
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if (script)
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nouveau_bios_run_init_table(dev, script, NULL);
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nouveau_bios_run_init_table(dev, perflvl->memscript, NULL);
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}
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if (state->pll.vco2.maxfreq) {
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if (state->type == PLL_MEMORY) {
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nv_wr32(dev, 0x100210, 0);
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