pinctrl: sh-pfc: sh73a0: Add MSIOF support
Add pins, groups, and a function for the 4 MSIOF devices. Note that the pin function name of MSIOF3 is named BBIF1. Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Geert Uytterhoeven
parent
b363d81972
commit
ae9335dc0c
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@ -2198,6 +2198,420 @@ static const unsigned int mmc0_ctrl_1_pins[] = {
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static const unsigned int mmc0_ctrl_1_mux[] = {
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MMCCMD1_MARK, MMCCLK1_MARK,
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};
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/* - MSIOF0 ----------------------------------------------------------------- */
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static const unsigned int msiof0_rsck_pins[] = {
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/* RSCK */
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66,
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};
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static const unsigned int msiof0_rsck_mux[] = {
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MSIOF0_RSCK_MARK,
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};
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static const unsigned int msiof0_tsck_pins[] = {
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/* TSCK */
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64,
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};
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static const unsigned int msiof0_tsck_mux[] = {
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MSIOF0_TSCK_MARK,
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};
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static const unsigned int msiof0_rsync_pins[] = {
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/* RSYNC */
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67,
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};
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static const unsigned int msiof0_rsync_mux[] = {
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MSIOF0_RSYNC_MARK,
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};
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static const unsigned int msiof0_tsync_pins[] = {
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/* TSYNC */
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63,
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};
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static const unsigned int msiof0_tsync_mux[] = {
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MSIOF0_TSYNC_MARK,
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};
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static const unsigned int msiof0_ss1_pins[] = {
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/* SS1 */
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62,
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};
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static const unsigned int msiof0_ss1_mux[] = {
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MSIOF0_SS1_MARK,
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};
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static const unsigned int msiof0_ss2_pins[] = {
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/* SS2 */
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71,
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};
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static const unsigned int msiof0_ss2_mux[] = {
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MSIOF0_SS2_MARK,
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};
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static const unsigned int msiof0_rxd_pins[] = {
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/* RXD */
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70,
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};
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static const unsigned int msiof0_rxd_mux[] = {
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MSIOF0_RXD_MARK,
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};
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static const unsigned int msiof0_txd_pins[] = {
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/* TXD */
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65,
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};
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static const unsigned int msiof0_txd_mux[] = {
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MSIOF0_TXD_MARK,
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};
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static const unsigned int msiof0_mck0_pins[] = {
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/* MSCK0 */
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68,
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};
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static const unsigned int msiof0_mck0_mux[] = {
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MSIOF0_MCK0_MARK,
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};
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static const unsigned int msiof0_mck1_pins[] = {
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/* MSCK1 */
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69,
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};
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static const unsigned int msiof0_mck1_mux[] = {
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MSIOF0_MCK1_MARK,
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};
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static const unsigned int msiof0l_rsck_pins[] = {
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/* RSCK */
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214,
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};
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static const unsigned int msiof0l_rsck_mux[] = {
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MSIOF0L_RSCK_MARK,
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};
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static const unsigned int msiof0l_tsck_pins[] = {
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/* TSCK */
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219,
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};
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static const unsigned int msiof0l_tsck_mux[] = {
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MSIOF0L_TSCK_MARK,
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};
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static const unsigned int msiof0l_rsync_pins[] = {
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/* RSYNC */
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215,
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};
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static const unsigned int msiof0l_rsync_mux[] = {
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MSIOF0L_RSYNC_MARK,
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};
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static const unsigned int msiof0l_tsync_pins[] = {
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/* TSYNC */
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217,
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};
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static const unsigned int msiof0l_tsync_mux[] = {
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MSIOF0L_TSYNC_MARK,
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};
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static const unsigned int msiof0l_ss1_a_pins[] = {
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/* SS1 */
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207,
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};
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static const unsigned int msiof0l_ss1_a_mux[] = {
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PORT207_MSIOF0L_SS1_MARK,
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};
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static const unsigned int msiof0l_ss1_b_pins[] = {
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/* SS1 */
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210,
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};
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static const unsigned int msiof0l_ss1_b_mux[] = {
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PORT210_MSIOF0L_SS1_MARK,
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};
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static const unsigned int msiof0l_ss2_a_pins[] = {
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/* SS2 */
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208,
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};
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static const unsigned int msiof0l_ss2_a_mux[] = {
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PORT208_MSIOF0L_SS2_MARK,
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};
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static const unsigned int msiof0l_ss2_b_pins[] = {
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/* SS2 */
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211,
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};
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static const unsigned int msiof0l_ss2_b_mux[] = {
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PORT211_MSIOF0L_SS2_MARK,
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};
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static const unsigned int msiof0l_rxd_pins[] = {
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/* RXD */
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221,
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};
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static const unsigned int msiof0l_rxd_mux[] = {
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MSIOF0L_RXD_MARK,
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};
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static const unsigned int msiof0l_txd_pins[] = {
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/* TXD */
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222,
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};
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static const unsigned int msiof0l_txd_mux[] = {
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MSIOF0L_TXD_MARK,
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};
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static const unsigned int msiof0l_mck0_pins[] = {
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/* MSCK0 */
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212,
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};
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static const unsigned int msiof0l_mck0_mux[] = {
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MSIOF0L_MCK0_MARK,
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};
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static const unsigned int msiof0l_mck1_pins[] = {
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/* MSCK1 */
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213,
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};
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static const unsigned int msiof0l_mck1_mux[] = {
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MSIOF0L_MCK1_MARK,
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};
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/* - MSIOF1 ----------------------------------------------------------------- */
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static const unsigned int msiof1_rsck_pins[] = {
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/* RSCK */
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234,
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};
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static const unsigned int msiof1_rsck_mux[] = {
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MSIOF1_RSCK_MARK,
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};
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static const unsigned int msiof1_tsck_pins[] = {
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/* TSCK */
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232,
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};
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static const unsigned int msiof1_tsck_mux[] = {
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MSIOF1_TSCK_MARK,
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};
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static const unsigned int msiof1_rsync_pins[] = {
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/* RSYNC */
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235,
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};
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static const unsigned int msiof1_rsync_mux[] = {
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MSIOF1_RSYNC_MARK,
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};
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static const unsigned int msiof1_tsync_pins[] = {
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/* TSYNC */
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231,
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};
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static const unsigned int msiof1_tsync_mux[] = {
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MSIOF1_TSYNC_MARK,
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};
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static const unsigned int msiof1_ss1_pins[] = {
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/* SS1 */
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238,
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};
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static const unsigned int msiof1_ss1_mux[] = {
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MSIOF1_SS1_MARK,
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};
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static const unsigned int msiof1_ss2_pins[] = {
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/* SS2 */
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239,
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};
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static const unsigned int msiof1_ss2_mux[] = {
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MSIOF1_SS2_MARK,
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};
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static const unsigned int msiof1_rxd_pins[] = {
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/* RXD */
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233,
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};
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static const unsigned int msiof1_rxd_mux[] = {
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MSIOF1_RXD_MARK,
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};
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static const unsigned int msiof1_txd_pins[] = {
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/* TXD */
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230,
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};
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static const unsigned int msiof1_txd_mux[] = {
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MSIOF1_TXD_MARK,
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};
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static const unsigned int msiof1_mck0_pins[] = {
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/* MSCK0 */
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236,
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};
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static const unsigned int msiof1_mck0_mux[] = {
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MSIOF1_MCK0_MARK,
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};
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static const unsigned int msiof1_mck1_pins[] = {
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/* MSCK1 */
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237,
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};
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static const unsigned int msiof1_mck1_mux[] = {
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MSIOF1_MCK1_MARK,
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};
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/* - MSIOF2 ----------------------------------------------------------------- */
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static const unsigned int msiof2_rsck_pins[] = {
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/* RSCK */
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151,
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};
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static const unsigned int msiof2_rsck_mux[] = {
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MSIOF2_RSCK_MARK,
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};
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static const unsigned int msiof2_tsck_pins[] = {
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/* TSCK */
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135,
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};
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static const unsigned int msiof2_tsck_mux[] = {
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MSIOF2_TSCK_MARK,
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};
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static const unsigned int msiof2_rsync_pins[] = {
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/* RSYNC */
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152,
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};
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static const unsigned int msiof2_rsync_mux[] = {
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MSIOF2_RSYNC_MARK,
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};
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static const unsigned int msiof2_tsync_pins[] = {
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/* TSYNC */
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133,
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};
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static const unsigned int msiof2_tsync_mux[] = {
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MSIOF2_TSYNC_MARK,
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};
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static const unsigned int msiof2_ss1_a_pins[] = {
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/* SS1 */
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131,
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};
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static const unsigned int msiof2_ss1_a_mux[] = {
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PORT131_MSIOF2_SS1_MARK,
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};
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static const unsigned int msiof2_ss1_b_pins[] = {
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/* SS1 */
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153,
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};
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static const unsigned int msiof2_ss1_b_mux[] = {
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PORT153_MSIOF2_SS1_MARK,
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};
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static const unsigned int msiof2_ss2_a_pins[] = {
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/* SS2 */
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132,
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};
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static const unsigned int msiof2_ss2_a_mux[] = {
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PORT132_MSIOF2_SS2_MARK,
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};
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static const unsigned int msiof2_ss2_b_pins[] = {
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/* SS2 */
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156,
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};
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static const unsigned int msiof2_ss2_b_mux[] = {
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PORT156_MSIOF2_SS2_MARK,
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};
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static const unsigned int msiof2_rxd_a_pins[] = {
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/* RXD */
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130,
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};
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static const unsigned int msiof2_rxd_a_mux[] = {
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PORT130_MSIOF2_RXD_MARK,
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};
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static const unsigned int msiof2_rxd_b_pins[] = {
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/* RXD */
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157,
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};
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static const unsigned int msiof2_rxd_b_mux[] = {
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PORT157_MSIOF2_RXD_MARK,
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};
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static const unsigned int msiof2_txd_pins[] = {
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/* TXD */
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134,
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};
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static const unsigned int msiof2_txd_mux[] = {
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MSIOF2_TXD_MARK,
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};
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static const unsigned int msiof2_mck0_pins[] = {
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/* MSCK0 */
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154,
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};
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static const unsigned int msiof2_mck0_mux[] = {
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MSIOF2_MCK0_MARK,
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};
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static const unsigned int msiof2_mck1_pins[] = {
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/* MSCK1 */
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155,
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};
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static const unsigned int msiof2_mck1_mux[] = {
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MSIOF2_MCK1_MARK,
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};
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static const unsigned int msiof2r_tsck_pins[] = {
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/* TSCK */
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248,
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};
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static const unsigned int msiof2r_tsck_mux[] = {
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MSIOF2R_TSCK_MARK,
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};
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static const unsigned int msiof2r_tsync_pins[] = {
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/* TSYNC */
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249,
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};
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static const unsigned int msiof2r_tsync_mux[] = {
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MSIOF2R_TSYNC_MARK,
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};
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static const unsigned int msiof2r_rxd_pins[] = {
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/* RXD */
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244,
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};
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static const unsigned int msiof2r_rxd_mux[] = {
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MSIOF2R_RXD_MARK,
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};
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static const unsigned int msiof2r_txd_pins[] = {
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/* TXD */
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245,
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};
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static const unsigned int msiof2r_txd_mux[] = {
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MSIOF2R_TXD_MARK,
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};
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/* - MSIOF3 (Pin function name of MSIOF3 is named BBIF1) -------------------- */
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static const unsigned int msiof3_rsck_pins[] = {
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/* RSCK */
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115,
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};
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static const unsigned int msiof3_rsck_mux[] = {
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BBIF1_RSCK_MARK,
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};
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static const unsigned int msiof3_tsck_pins[] = {
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/* TSCK */
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112,
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};
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static const unsigned int msiof3_tsck_mux[] = {
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BBIF1_TSCK_MARK,
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};
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static const unsigned int msiof3_rsync_pins[] = {
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/* RSYNC */
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116,
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};
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static const unsigned int msiof3_rsync_mux[] = {
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BBIF1_RSYNC_MARK,
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};
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static const unsigned int msiof3_tsync_pins[] = {
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/* TSYNC */
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113,
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};
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static const unsigned int msiof3_tsync_mux[] = {
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BBIF1_TSYNC_MARK,
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};
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static const unsigned int msiof3_ss1_pins[] = {
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/* SS1 */
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117,
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};
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static const unsigned int msiof3_ss1_mux[] = {
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BBIF1_SS1_MARK,
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};
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static const unsigned int msiof3_ss2_pins[] = {
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/* SS2 */
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109,
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};
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static const unsigned int msiof3_ss2_mux[] = {
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BBIF1_SS2_MARK,
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};
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static const unsigned int msiof3_rxd_pins[] = {
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/* RXD */
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111,
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};
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static const unsigned int msiof3_rxd_mux[] = {
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BBIF1_RXD_MARK,
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};
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static const unsigned int msiof3_txd_pins[] = {
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/* TXD */
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114,
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};
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static const unsigned int msiof3_txd_mux[] = {
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BBIF1_TXD_MARK,
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};
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static const unsigned int msiof3_flow_pins[] = {
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/* FLOW */
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117,
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};
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static const unsigned int msiof3_flow_mux[] = {
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BBIF1_FLOW_MARK,
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};
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/* - SCIFA0 ----------------------------------------------------------------- */
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static const unsigned int scifa0_data_pins[] = {
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/* RXD, TXD */
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@ -2782,6 +3196,64 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
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SH_PFC_PIN_GROUP(mmc0_data4_1),
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SH_PFC_PIN_GROUP(mmc0_data8_1),
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SH_PFC_PIN_GROUP(mmc0_ctrl_1),
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SH_PFC_PIN_GROUP(msiof0_rsck),
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SH_PFC_PIN_GROUP(msiof0_tsck),
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SH_PFC_PIN_GROUP(msiof0_rsync),
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SH_PFC_PIN_GROUP(msiof0_tsync),
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SH_PFC_PIN_GROUP(msiof0_ss1),
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SH_PFC_PIN_GROUP(msiof0_ss2),
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SH_PFC_PIN_GROUP(msiof0_rxd),
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SH_PFC_PIN_GROUP(msiof0_txd),
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SH_PFC_PIN_GROUP(msiof0_mck0),
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SH_PFC_PIN_GROUP(msiof0_mck1),
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SH_PFC_PIN_GROUP(msiof0l_rsck),
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SH_PFC_PIN_GROUP(msiof0l_tsck),
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SH_PFC_PIN_GROUP(msiof0l_rsync),
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SH_PFC_PIN_GROUP(msiof0l_tsync),
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SH_PFC_PIN_GROUP(msiof0l_ss1_a),
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SH_PFC_PIN_GROUP(msiof0l_ss1_b),
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SH_PFC_PIN_GROUP(msiof0l_ss2_a),
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SH_PFC_PIN_GROUP(msiof0l_ss2_b),
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SH_PFC_PIN_GROUP(msiof0l_rxd),
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SH_PFC_PIN_GROUP(msiof0l_txd),
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SH_PFC_PIN_GROUP(msiof0l_mck0),
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SH_PFC_PIN_GROUP(msiof0l_mck1),
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SH_PFC_PIN_GROUP(msiof1_rsck),
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SH_PFC_PIN_GROUP(msiof1_tsck),
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SH_PFC_PIN_GROUP(msiof1_rsync),
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SH_PFC_PIN_GROUP(msiof1_tsync),
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SH_PFC_PIN_GROUP(msiof1_ss1),
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SH_PFC_PIN_GROUP(msiof1_ss2),
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SH_PFC_PIN_GROUP(msiof1_rxd),
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SH_PFC_PIN_GROUP(msiof1_txd),
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SH_PFC_PIN_GROUP(msiof1_mck0),
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SH_PFC_PIN_GROUP(msiof1_mck1),
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SH_PFC_PIN_GROUP(msiof2_rsck),
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SH_PFC_PIN_GROUP(msiof2_tsck),
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SH_PFC_PIN_GROUP(msiof2_rsync),
|
||||
SH_PFC_PIN_GROUP(msiof2_tsync),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss1_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss1_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss2_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_ss2_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_rxd_a),
|
||||
SH_PFC_PIN_GROUP(msiof2_rxd_b),
|
||||
SH_PFC_PIN_GROUP(msiof2_txd),
|
||||
SH_PFC_PIN_GROUP(msiof2_mck0),
|
||||
SH_PFC_PIN_GROUP(msiof2_mck1),
|
||||
SH_PFC_PIN_GROUP(msiof2r_tsck),
|
||||
SH_PFC_PIN_GROUP(msiof2r_tsync),
|
||||
SH_PFC_PIN_GROUP(msiof2r_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof2r_txd),
|
||||
SH_PFC_PIN_GROUP(msiof3_rsck),
|
||||
SH_PFC_PIN_GROUP(msiof3_tsck),
|
||||
SH_PFC_PIN_GROUP(msiof3_rsync),
|
||||
SH_PFC_PIN_GROUP(msiof3_tsync),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss1),
|
||||
SH_PFC_PIN_GROUP(msiof3_ss2),
|
||||
SH_PFC_PIN_GROUP(msiof3_rxd),
|
||||
SH_PFC_PIN_GROUP(msiof3_txd),
|
||||
SH_PFC_PIN_GROUP(msiof3_flow),
|
||||
SH_PFC_PIN_GROUP(scifa0_data),
|
||||
SH_PFC_PIN_GROUP(scifa0_clk),
|
||||
SH_PFC_PIN_GROUP(scifa0_ctrl),
|
||||
|
|
@ -2982,6 +3454,76 @@ static const char * const mmc0_groups[] = {
|
|||
"mmc0_ctrl_1",
|
||||
};
|
||||
|
||||
static const char * const msiof0_groups[] = {
|
||||
"msiof0_rsck",
|
||||
"msiof0_tsck",
|
||||
"msiof0_rsync",
|
||||
"msiof0_tsync",
|
||||
"msiof0_ss1",
|
||||
"msiof0_ss2",
|
||||
"msiof0_rxd",
|
||||
"msiof0_txd",
|
||||
"msiof0_mck0",
|
||||
"msiof0_mck1",
|
||||
"msiof0l_rsck",
|
||||
"msiof0l_tsck",
|
||||
"msiof0l_rsync",
|
||||
"msiof0l_tsync",
|
||||
"msiof0l_ss1_a",
|
||||
"msiof0l_ss1_b",
|
||||
"msiof0l_ss2_a",
|
||||
"msiof0l_ss2_b",
|
||||
"msiof0l_rxd",
|
||||
"msiof0l_txd",
|
||||
"msiof0l_mck0",
|
||||
"msiof0l_mck1",
|
||||
};
|
||||
|
||||
static const char * const msiof1_groups[] = {
|
||||
"msiof1_rsck",
|
||||
"msiof1_tsck",
|
||||
"msiof1_rsync",
|
||||
"msiof1_tsync",
|
||||
"msiof1_ss1",
|
||||
"msiof1_ss2",
|
||||
"msiof1_rxd",
|
||||
"msiof1_txd",
|
||||
"msiof1_mck0",
|
||||
"msiof1_mck1",
|
||||
};
|
||||
|
||||
static const char * const msiof2_groups[] = {
|
||||
"msiof2_rsck",
|
||||
"msiof2_tsck",
|
||||
"msiof2_rsync",
|
||||
"msiof2_tsync",
|
||||
"msiof2_ss1_a",
|
||||
"msiof2_ss1_b",
|
||||
"msiof2_ss2_a",
|
||||
"msiof2_ss2_b",
|
||||
"msiof2_rxd_a",
|
||||
"msiof2_rxd_b",
|
||||
"msiof2_txd",
|
||||
"msiof2_mck0",
|
||||
"msiof2_mck1",
|
||||
"msiof2r_tsck",
|
||||
"msiof2r_tsync",
|
||||
"msiof2r_rxd",
|
||||
"msiof2r_txd",
|
||||
};
|
||||
|
||||
static const char * const msiof3_groups[] = {
|
||||
"msiof3_rsck",
|
||||
"msiof3_tsck",
|
||||
"msiof3_rsync",
|
||||
"msiof3_tsync",
|
||||
"msiof3_ss1",
|
||||
"msiof3_ss2",
|
||||
"msiof3_rxd",
|
||||
"msiof3_txd",
|
||||
"msiof3_flow",
|
||||
};
|
||||
|
||||
static const char * const scifa0_groups[] = {
|
||||
"scifa0_data",
|
||||
"scifa0_clk",
|
||||
|
|
@ -3116,6 +3658,10 @@ static const struct sh_pfc_function pinmux_functions[] = {
|
|||
SH_PFC_FUNCTION(lcd),
|
||||
SH_PFC_FUNCTION(lcd2),
|
||||
SH_PFC_FUNCTION(mmc0),
|
||||
SH_PFC_FUNCTION(msiof0),
|
||||
SH_PFC_FUNCTION(msiof1),
|
||||
SH_PFC_FUNCTION(msiof2),
|
||||
SH_PFC_FUNCTION(msiof3),
|
||||
SH_PFC_FUNCTION(scifa0),
|
||||
SH_PFC_FUNCTION(scifa1),
|
||||
SH_PFC_FUNCTION(scifa2),
|
||||
|
|
|
|||
Loading…
Reference in New Issue