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[ARM] OMAP: Make dpll4_m4_ck programmable with clk_set_rate() 

Filling the set_rate and round_rate fields of dpll4_m4_ck makes
this clock programmable through clk_set_rate().  This is needed
to give omapfb control over the dss1_alwon_fck rate.

This patch includes a fix from Tomi Valkeinen <tomi.valkeinen@nokia.com>.

linux-omap source commits are e42218d45afbc3e654e289e021e6b80c657b16c2 and
9d211b761b3cdf7736602ecf7e68f8a298c13278.

Signed-off-by: Måns Rullgård <mans@mansr.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@nokia.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Paul Walmsley 2009-01-27 19:13:12 -07:00 committed by Russell King
parent 6c8fe0b954
commit ae8578c019
1 changed files with 2 additions and 0 deletions
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2
arch/arm/mach-omap2/clock34xx.h
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@ -811,6 +811,8 @@ static struct clk dpll4_m4_ck = {
.clksel = div16_dpll4_clksel,
.flags = RATE_PROPAGATES,
.recalc = &omap2_clksel_recalc,
.set_rate = &omap2_clksel_set_rate,
.round_rate = &omap2_clksel_round_rate,
};
/* The PWRDN bit is apparently only available on 3430ES2 and above */