arm: Disable outer (L2) cache in kexec
kexec does not disable the outer cache before disabling the inner caches in cpu_proc_fin(). So L2 is enabled across the kexec jump. When the new kernel enables chaches again, it randomly crashes. Disabling L2 before calling cpu_proc_fin() cures the problem. Disabling L2 requires the following new functions: flush_all(), inv_all() and disable(). Add them to outer_cache_fns and call them from the kexec code. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Linus Walleij <linus.walleij@stericsson.com>
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@ -25,6 +25,9 @@ struct outer_cache_fns {
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void (*inv_range)(unsigned long, unsigned long);
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void (*clean_range)(unsigned long, unsigned long);
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void (*flush_range)(unsigned long, unsigned long);
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void (*flush_all)(void);
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void (*inv_all)(void);
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void (*disable)(void);
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#ifdef CONFIG_OUTER_CACHE_SYNC
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void (*sync)(void);
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#endif
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@ -50,6 +53,24 @@ static inline void outer_flush_range(unsigned long start, unsigned long end)
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outer_cache.flush_range(start, end);
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}
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static inline void outer_flush_all(void)
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{
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if (outer_cache.flush_all)
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outer_cache.flush_all();
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}
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static inline void outer_inv_all(void)
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{
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if (outer_cache.inv_all)
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outer_cache.inv_all();
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}
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static inline void outer_disable(void)
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{
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if (outer_cache.disable)
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outer_cache.disable();
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}
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#else
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static inline void outer_inv_range(unsigned long start, unsigned long end)
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@ -58,6 +79,9 @@ static inline void outer_clean_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_range(unsigned long start, unsigned long end)
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{ }
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static inline void outer_flush_all(void) { }
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static inline void outer_inv_all(void) { }
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static inline void outer_disable(void) { }
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#endif
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@ -78,7 +78,10 @@ void machine_kexec(struct kimage *image)
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local_fiq_disable();
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setup_mm_for_reboot(0); /* mode is not used, so just pass 0*/
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flush_cache_all();
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outer_flush_all();
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outer_disable();
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cpu_proc_fin();
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outer_inv_all();
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flush_cache_all();
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cpu_reset(reboot_code_buffer_phys);
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}
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