rtl8xxxu: Load AGC table before patching for 1T2R parts
This should get the order right and avoid patching something that is later overwritten. Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@ -3811,6 +3811,20 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
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priv->fops->init_phy_bb(priv);
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priv->fops->init_phy_bb(priv);
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if (priv->rtl_chip == RTL8723B)
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_8723bu_table);
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else if (priv->rtl_chip == RTL8192E) {
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if (priv->hi_pa)
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rtl8xxxu_init_phy_regs(priv,
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rtl8xxx_agc_8192eu_highpa_table);
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else
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rtl8xxxu_init_phy_regs(priv,
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rtl8xxx_agc_8192eu_std_table);
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} else if (priv->hi_pa)
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_highpa_table);
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else
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_standard_table);
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if (priv->tx_paths == 1 && priv->rx_paths == 2) {
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if (priv->tx_paths == 1 && priv->rx_paths == 2) {
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/*
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/*
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* For 1T2R boards, patch the registers.
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* For 1T2R boards, patch the registers.
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@ -3871,20 +3885,6 @@ static int rtl8xxxu_init_phy_bb(struct rtl8xxxu_priv *priv)
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rtl8xxxu_write32(priv, REG_TX_TO_TX, val32);
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rtl8xxxu_write32(priv, REG_TX_TO_TX, val32);
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}
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}
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if (priv->rtl_chip == RTL8723B)
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_8723bu_table);
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else if (priv->rtl_chip == RTL8192E) {
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if (priv->hi_pa)
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rtl8xxxu_init_phy_regs(priv,
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rtl8xxx_agc_8192eu_highpa_table);
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else
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rtl8xxxu_init_phy_regs(priv,
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rtl8xxx_agc_8192eu_std_table);
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} else if (priv->hi_pa)
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_highpa_table);
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else
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rtl8xxxu_init_phy_regs(priv, rtl8xxx_agc_standard_table);
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if (priv->has_xtalk) {
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if (priv->has_xtalk) {
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val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL);
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val32 = rtl8xxxu_read32(priv, REG_MAC_PHY_CTRL);
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