drm/amd/amdgpu: fix PCIe dpm feature issue (v3)
use pcie_bandwidth_available to get real link state to update pcie table. v2: fix incorrect initialized return value v3: expand the fetching method about the link width to all asics. Signed-off-by: Chengming Gui <Jack.Gui@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -3625,6 +3625,7 @@ static void amdgpu_device_get_min_pci_speed_width(struct amdgpu_device *adev,
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struct pci_dev *pdev = adev->pdev;
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enum pci_bus_speed cur_speed;
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enum pcie_link_width cur_width;
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u32 ret = 1;
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*speed = PCI_SPEED_UNKNOWN;
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*width = PCIE_LNK_WIDTH_UNKNOWN;
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@ -3632,6 +3633,10 @@ static void amdgpu_device_get_min_pci_speed_width(struct amdgpu_device *adev,
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while (pdev) {
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cur_speed = pcie_get_speed_cap(pdev);
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cur_width = pcie_get_width_cap(pdev);
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ret = pcie_bandwidth_available(adev->pdev, NULL,
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NULL, &cur_width);
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if (!ret)
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cur_width = PCIE_LNK_WIDTH_RESRV;
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if (cur_speed != PCI_SPEED_UNKNOWN) {
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if (*speed == PCI_SPEED_UNKNOWN)
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