RDMA/mlx5: Use mlx5_umem_find_best_quantized_pgoff() for WQ
This fixes a subtle bug, the WQ mailbox has only 5 bits to describe the page_offset, while mlx5_ib_get_buf_offset() is hard wired to only work with 6 bit page_offsets. Thus it did not properly reject badly aligned buffers. Fixes:79b20a6c30
("IB/mlx5: Add receive Work Queue verbs") Fixes:0fb2ed66a1
("IB/mlx5: Add create and destroy functionality for Raw Packet QP") Link: https://lore.kernel.org/r/20201115114311.136250-3-leon@kernel.org Signed-off-by: Leon Romanovsky <leonro@nvidia.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
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@ -833,7 +833,7 @@ static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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{
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struct mlx5_ib_ucontext *ucontext = rdma_udata_to_drv_context(
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udata, struct mlx5_ib_ucontext, ibucontext);
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int page_shift = 0;
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unsigned long page_size = 0;
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u32 offset = 0;
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int err;
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@ -847,24 +847,25 @@ static int create_user_rq(struct mlx5_ib_dev *dev, struct ib_pd *pd,
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return err;
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}
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mlx5_ib_cont_pages(rwq->umem, ucmd->buf_addr, 0, &page_shift);
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err = mlx5_ib_get_buf_offset(ucmd->buf_addr, page_shift,
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&rwq->rq_page_offset);
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if (err) {
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page_size = mlx5_umem_find_best_quantized_pgoff(
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rwq->umem, wq, log_wq_pg_sz, MLX5_ADAPTER_PAGE_SHIFT,
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page_offset, 64, &rwq->rq_page_offset);
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if (!page_size) {
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mlx5_ib_warn(dev, "bad offset\n");
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err = -EINVAL;
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goto err_umem;
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}
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rwq->rq_num_pas = ib_umem_num_dma_blocks(rwq->umem, 1UL << page_shift);
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rwq->page_shift = page_shift;
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rwq->log_page_size = page_shift - MLX5_ADAPTER_PAGE_SHIFT;
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rwq->rq_num_pas = ib_umem_num_dma_blocks(rwq->umem, page_size);
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rwq->page_shift = order_base_2(page_size);
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rwq->log_page_size = rwq->page_shift - MLX5_ADAPTER_PAGE_SHIFT;
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rwq->wq_sig = !!(ucmd->flags & MLX5_WQ_FLAG_SIGNATURE);
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mlx5_ib_dbg(
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dev,
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"addr 0x%llx, size %zd, npages %zu, page_shift %d, ncont %d, offset %d\n",
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"addr 0x%llx, size %zd, npages %zu, page_size %ld, ncont %d, offset %d\n",
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(unsigned long long)ucmd->buf_addr, rwq->buf_size,
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ib_umem_num_pages(rwq->umem), page_shift, rwq->rq_num_pas,
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ib_umem_num_pages(rwq->umem), page_size, rwq->rq_num_pas,
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offset);
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err = mlx5_ib_db_map_user(ucontext, udata, ucmd->db_addr, &rwq->db);
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@ -1209,17 +1210,24 @@ static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
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void *wq;
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int inlen;
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int err;
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int page_shift = 0;
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u32 offset = 0;
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unsigned int page_offset_quantized;
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unsigned long page_size;
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err = mlx5_ib_umem_get(dev, udata, ubuffer->buf_addr, ubuffer->buf_size,
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&sq->ubuffer.umem, &page_shift, &offset);
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if (err)
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return err;
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sq->ubuffer.umem = ib_umem_get(&dev->ib_dev, ubuffer->buf_addr,
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ubuffer->buf_size, 0);
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if (IS_ERR(sq->ubuffer.umem))
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return PTR_ERR(sq->ubuffer.umem);
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page_size = mlx5_umem_find_best_quantized_pgoff(
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ubuffer->umem, wq, log_wq_pg_sz, MLX5_ADAPTER_PAGE_SHIFT,
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page_offset, 64, &page_offset_quantized);
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if (!page_size) {
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err = -EINVAL;
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goto err_umem;
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}
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inlen = MLX5_ST_SZ_BYTES(create_sq_in) +
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sizeof(u64) * ib_umem_num_dma_blocks(sq->ubuffer.umem,
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1UL << page_shift);
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sizeof(u64) *
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ib_umem_num_dma_blocks(sq->ubuffer.umem, page_size);
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in = kvzalloc(inlen, GFP_KERNEL);
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if (!in) {
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err = -ENOMEM;
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@ -1247,11 +1255,12 @@ static int create_raw_packet_qp_sq(struct mlx5_ib_dev *dev,
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MLX5_SET64(wq, wq, dbr_addr, MLX5_GET64(qpc, qpc, dbr_addr));
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MLX5_SET(wq, wq, log_wq_stride, ilog2(MLX5_SEND_WQE_BB));
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MLX5_SET(wq, wq, log_wq_sz, MLX5_GET(qpc, qpc, log_sq_size));
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MLX5_SET(wq, wq, log_wq_pg_sz, page_shift - MLX5_ADAPTER_PAGE_SHIFT);
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MLX5_SET(wq, wq, page_offset, offset);
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MLX5_SET(wq, wq, log_wq_pg_sz,
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order_base_2(page_size) - MLX5_ADAPTER_PAGE_SHIFT);
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MLX5_SET(wq, wq, page_offset, page_offset_quantized);
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pas = (__be64 *)MLX5_ADDR_OF(wq, wq, pas);
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mlx5_ib_populate_pas(sq->ubuffer.umem, 1UL << page_shift, pas, 0);
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mlx5_ib_populate_pas(sq->ubuffer.umem, page_size, pas, 0);
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err = mlx5_core_create_sq_tracked(dev, in, inlen, &sq->base.mqp);
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