KVM: arm64: Program the timer traps with VHE layout in hVHE mode
Just like the rest of the timer code, we need to shift the enable bits around when HCR_EL2.E2H is set, which is the case in hVHE mode. Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20230609162200.2024064-15-maz@kernel.org Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
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@ -17,21 +17,24 @@ void __kvm_timer_set_cntvoff(u64 cntvoff)
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}
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/*
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* Should only be called on non-VHE systems.
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* Should only be called on non-VHE or hVHE setups.
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* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
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*/
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void __timer_disable_traps(struct kvm_vcpu *vcpu)
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{
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u64 val;
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u64 val, shift = 0;
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if (has_hvhe())
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shift = 10;
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/* Allow physical timer/counter access for the host */
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val = read_sysreg(cnthctl_el2);
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val |= CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN;
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val |= (CNTHCTL_EL1PCTEN | CNTHCTL_EL1PCEN) << shift;
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write_sysreg(val, cnthctl_el2);
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}
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/*
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* Should only be called on non-VHE systems.
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* Should only be called on non-VHE or hVHE setups.
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* VHE systems use EL2 timers and configure EL1 timers in kvm_timer_init_vhe().
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*/
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void __timer_enable_traps(struct kvm_vcpu *vcpu)
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@ -50,5 +53,10 @@ void __timer_enable_traps(struct kvm_vcpu *vcpu)
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else
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clr |= CNTHCTL_EL1PCTEN;
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if (has_hvhe()) {
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clr <<= 10;
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set <<= 10;
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}
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sysreg_clear_set(cnthctl_el2, clr, set);
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}
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