rtw89: phy: handle txpwr lmt/lmt_ru of 6G band
Add declarations of 6G stuff and extend rtw89_channel_to_idx() to map 6G's channels to 6G channel indexes. While 6G, correspondingly read 6G's entry for tx power limit and limit_ru. After this, we should pay attention to chip_info::support_bands. If a chip declares 6G support, it must configure txpwr_lmt_6g and txpwr_lmt_ru_6g in case accessing NULL pointer while setting tx power limit/limit_ru on 6G band. Signed-off-by: Zong-Zhe Yang <kevin_yang@realtek.com> Signed-off-by: Ping-Ke Shih <pkshih@realtek.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20220218034017.9160-2-pkshih@realtek.com
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@ -371,6 +371,25 @@ enum rtw89_hw_rate {
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*/
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#define RTW89_5G_CH_NUM 53
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/* 6G channels,
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* 1, 3, 5, 7, 9, 11, 13, 15,
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* 17, 19, 21, 23, 25, 27, 29, 33,
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* 35, 37, 39, 41, 43, 45, 47, 49,
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* 51, 53, 55, 57, 59, 61, 65, 67,
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* 69, 71, 73, 75, 77, 79, 81, 83,
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* 85, 87, 89, 91, 93, 97, 99, 101,
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* 103, 105, 107, 109, 111, 113, 115, 117,
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* 119, 121, 123, 125, 129, 131, 133, 135,
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* 137, 139, 141, 143, 145, 147, 149, 151,
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* 153, 155, 157, 161, 163, 165, 167, 169,
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* 171, 173, 175, 177, 179, 181, 183, 185,
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* 187, 189, 193, 195, 197, 199, 201, 203,
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* 205, 207, 209, 211, 213, 215, 217, 219,
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* 221, 225, 227, 229, 231, 233, 235, 237,
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* 239, 241, 243, 245, 247, 249, 251, 253,
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*/
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#define RTW89_6G_CH_NUM 120
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enum rtw89_rate_section {
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RTW89_RS_CCK,
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RTW89_RS_OFDM,
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@ -554,6 +573,7 @@ enum rtw89_ps_mode {
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#define RTW89_2G_BW_NUM (RTW89_CHANNEL_WIDTH_40 + 1)
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#define RTW89_5G_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1)
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#define RTW89_6G_BW_NUM (RTW89_CHANNEL_WIDTH_160 + 1)
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#define RTW89_PPE_BW_NUM (RTW89_CHANNEL_WIDTH_80 + 1)
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enum rtw89_ru_bandwidth {
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@ -2246,10 +2266,15 @@ struct rtw89_chip_info {
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const s8 (*txpwr_lmt_5g)[RTW89_5G_BW_NUM][RTW89_NTX_NUM]
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[RTW89_RS_LMT_NUM][RTW89_BF_NUM]
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[RTW89_REGD_NUM][RTW89_5G_CH_NUM];
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const s8 (*txpwr_lmt_6g)[RTW89_6G_BW_NUM][RTW89_NTX_NUM]
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[RTW89_RS_LMT_NUM][RTW89_BF_NUM]
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[RTW89_REGD_NUM][RTW89_6G_CH_NUM];
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const s8 (*txpwr_lmt_ru_2g)[RTW89_RU_NUM][RTW89_NTX_NUM]
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[RTW89_REGD_NUM][RTW89_2G_CH_NUM];
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const s8 (*txpwr_lmt_ru_5g)[RTW89_RU_NUM][RTW89_NTX_NUM]
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[RTW89_REGD_NUM][RTW89_5G_CH_NUM];
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const s8 (*txpwr_lmt_ru_6g)[RTW89_RU_NUM][RTW89_NTX_NUM]
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[RTW89_REGD_NUM][RTW89_6G_CH_NUM];
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u8 txpwr_factor_rf;
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u8 txpwr_factor_mac;
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@ -1115,8 +1115,36 @@ s8 rtw89_phy_read_txpwr_byrate(struct rtw89_dev *rtwdev,
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}
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EXPORT_SYMBOL(rtw89_phy_read_txpwr_byrate);
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static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 channel)
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static u8 rtw89_channel_6g_to_idx(struct rtw89_dev *rtwdev, u8 channel_6g)
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{
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switch (channel_6g) {
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case 1 ... 29:
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return (channel_6g - 1) / 2;
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case 33 ... 61:
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return (channel_6g - 3) / 2;
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case 65 ... 93:
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return (channel_6g - 5) / 2;
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case 97 ... 125:
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return (channel_6g - 7) / 2;
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case 129 ... 157:
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return (channel_6g - 9) / 2;
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case 161 ... 189:
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return (channel_6g - 11) / 2;
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case 193 ... 221:
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return (channel_6g - 13) / 2;
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case 225 ... 253:
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return (channel_6g - 15) / 2;
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default:
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rtw89_warn(rtwdev, "unknown 6g channel: %d\n", channel_6g);
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return 0;
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}
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}
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static u8 rtw89_channel_to_idx(struct rtw89_dev *rtwdev, u8 band, u8 channel)
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{
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if (band == RTW89_BAND_6G)
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return rtw89_channel_6g_to_idx(rtwdev, channel);
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switch (channel) {
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case 1 ... 14:
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return channel - 1;
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@ -1136,8 +1164,8 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev,
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u8 bw, u8 ntx, u8 rs, u8 bf, u8 ch)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch);
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u8 band = rtwdev->hal.current_band_type;
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u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
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u8 regd = rtw89_regd_get(rtwdev, band);
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s8 lmt = 0, sar;
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@ -1154,6 +1182,12 @@ s8 rtw89_phy_read_txpwr_limit(struct rtw89_dev *rtwdev,
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lmt = (*chip->txpwr_lmt_5g)[bw][ntx][rs][bf]
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[RTW89_WW][ch_idx];
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break;
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case RTW89_BAND_6G:
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lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf][regd][ch_idx];
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if (!lmt)
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lmt = (*chip->txpwr_lmt_6g)[bw][ntx][rs][bf]
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[RTW89_WW][ch_idx];
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break;
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default:
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rtw89_warn(rtwdev, "unknown band type: %d\n", band);
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return 0;
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@ -1269,8 +1303,8 @@ static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev,
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u8 ru, u8 ntx, u8 ch)
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{
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const struct rtw89_chip_info *chip = rtwdev->chip;
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u8 ch_idx = rtw89_channel_to_idx(rtwdev, ch);
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u8 band = rtwdev->hal.current_band_type;
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u8 ch_idx = rtw89_channel_to_idx(rtwdev, band, ch);
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u8 regd = rtw89_regd_get(rtwdev, band);
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s8 lmt_ru = 0, sar;
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@ -1287,6 +1321,12 @@ static s8 rtw89_phy_read_txpwr_limit_ru(struct rtw89_dev *rtwdev,
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lmt_ru = (*chip->txpwr_lmt_ru_5g)[ru][ntx]
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[RTW89_WW][ch_idx];
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break;
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case RTW89_BAND_6G:
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lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx][regd][ch_idx];
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if (!lmt_ru)
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lmt_ru = (*chip->txpwr_lmt_ru_6g)[ru][ntx]
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[RTW89_WW][ch_idx];
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break;
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default:
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rtw89_warn(rtwdev, "unknown band type: %d\n", band);
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return 0;
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