drm/nouveau: correct memtiming table parsing for nv4x
In line with envytools, verified on 4 or 5 BIOS'es. Signed-off-by: Ben Skeggs <bskeggs@redhat.com> Signed-off-by: Roy Spliet <r.spliet@student.tudelft.nl>
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@ -552,6 +552,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
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u8 tRC; /* Byte 9 */
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u8 tUNK_10, tUNK_11, tUNK_12, tUNK_13, tUNK_14;
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u8 tUNK_18, tUNK_19, tUNK_20, tUNK_21;
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u8 magic_number = 0; /* Yeah... sorry*/
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u8 *mem = NULL, *entry;
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int i, recordlen, entries;
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@ -596,6 +597,12 @@ nouveau_mem_timing_init(struct drm_device *dev)
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if (!memtimings->timing)
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return;
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/* Get "some number" from the timing reg for NV_40
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* Used in calculations later */
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if(dev_priv->card_type == NV_40) {
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magic_number = (nv_rd32(dev,0x100228) & 0x0f000000) >> 24;
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}
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entry = mem + mem[1];
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for (i = 0; i < entries; i++, entry += recordlen) {
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struct nouveau_pm_memtiming *timing = &pm->memtimings.timing[i];
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@ -635,36 +642,51 @@ nouveau_mem_timing_init(struct drm_device *dev)
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/* XXX: I don't trust the -1's and +1's... they must come
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* from somewhere! */
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timing->reg_100224 = ((tUNK_0 + tUNK_19 + 1) << 24 |
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timing->reg_100224 = (tUNK_0 + tUNK_19 + 1 + magic_number) << 24 |
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tUNK_18 << 16 |
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(tUNK_1 + tUNK_19 + 1) << 8 |
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(tUNK_2 - 1));
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(tUNK_1 + tUNK_19 + 1 + magic_number) << 8;
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if(dev_priv->chipset == 0xa8) {
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timing->reg_100224 |= (tUNK_2 - 1);
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} else {
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timing->reg_100224 |= (tUNK_2 + 2 - magic_number);
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}
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timing->reg_100228 = (tUNK_12 << 16 | tUNK_11 << 8 | tUNK_10);
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if(recordlen > 19) {
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timing->reg_100228 += (tUNK_19 - 1) << 24;
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}/* I cannot back-up this else-statement right now
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else {
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timing->reg_100228 += tUNK_12 << 24;
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}*/
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if(dev_priv->chipset >= 0xa3 && dev_priv->chipset < 0xaa) {
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timing->reg_100228 |= (tUNK_19 - 1) << 24;
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}
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/* XXX: reg_10022c */
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timing->reg_10022c = tUNK_2 - 1;
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if(dev_priv->card_type == NV_40) {
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/* NV40: don't know what the rest of the regs are..
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* And don't need to know either */
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timing->reg_100228 |= 0x20200000 | magic_number << 24;
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} else if(dev_priv->card_type >= NV_50) {
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/* XXX: reg_10022c */
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timing->reg_10022c = tUNK_2 - 1;
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timing->reg_100230 = (tUNK_20 << 24 | tUNK_21 << 16 |
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tUNK_13 << 8 | tUNK_13);
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timing->reg_100230 = (tUNK_20 << 24 | tUNK_21 << 16 |
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tUNK_13 << 8 | tUNK_13);
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/* XXX: +6? */
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timing->reg_100234 = (tRAS << 24 | (tUNK_19 + 6) << 8 | tRC);
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timing->reg_100234 += max(tUNK_10,tUNK_11) << 16;
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timing->reg_100234 = (tRAS << 24 | tRC);
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timing->reg_100234 += max(tUNK_10,tUNK_11) << 16;
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/* XXX; reg_100238, reg_10023c
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* reg: 0x00??????
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* reg_10023c:
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* 0 for pre-NV50 cards
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* 0x????0202 for NV50+ cards (empirical evidence) */
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if(dev_priv->card_type >= NV_50) {
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if(dev_priv->chipset < 0xa3) {
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timing->reg_100234 |= (tUNK_2 + 2) << 8;
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} else {
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/* XXX: +6? */
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timing->reg_100234 |= (tUNK_19 + 6) << 8;
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}
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/* XXX; reg_100238, reg_10023c
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* reg_100238: 0x00??????
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* reg_10023c: 0x!!??0202 for NV50+ cards (empirical evidence) */
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timing->reg_10023c = 0x202;
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if(dev_priv->chipset < 0xa3) {
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timing->reg_10023c |= 0x4000000 | (tUNK_2 - 1) << 16;
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} else {
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/* currently unknown
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* 10023c seen as 06xxxxxx, 0bxxxxxx or 0fxxxxxx */
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}
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}
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NV_DEBUG(dev, "Entry %d: 220: %08x %08x %08x %08x\n", i,
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@ -675,7 +697,7 @@ nouveau_mem_timing_init(struct drm_device *dev)
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timing->reg_100238, timing->reg_10023c);
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}
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memtimings->nr_timing = entries;
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memtimings->nr_timing = entries;
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memtimings->supported = true;
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}
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