drm/nouveau/ibus: cosmetic changes
This is purely preparation for upcoming commits, there should be no code changes here. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs
parent
5b920d9264
commit
ac51596f27
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@ -3,7 +3,7 @@
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#include <core/subdev.h>
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struct nvkm_ibus {
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struct nvkm_subdev base;
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struct nvkm_subdev subdev;
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};
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static inline struct nvkm_ibus *
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@ -16,11 +16,11 @@ nvkm_ibus(void *obj)
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nvkm_subdev_create_((p), (e), (o), 0, "PIBUS", "ibus", \
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sizeof(**d), (void **)d)
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#define nvkm_ibus_destroy(p) \
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nvkm_subdev_destroy(&(p)->base)
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nvkm_subdev_destroy(&(p)->subdev)
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#define nvkm_ibus_init(p) \
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nvkm_subdev_init(&(p)->base)
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nvkm_subdev_init(&(p)->subdev)
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#define nvkm_ibus_fini(p,s) \
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nvkm_subdev_fini(&(p)->base, (s))
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nvkm_subdev_fini(&(p)->subdev, (s))
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#define _nvkm_ibus_dtor _nvkm_subdev_dtor
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#define _nvkm_ibus_init _nvkm_subdev_init
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@ -23,55 +23,51 @@
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*/
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#include <subdev/ibus.h>
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struct gf100_ibus_priv {
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struct nvkm_ibus base;
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};
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static void
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gf100_ibus_intr_hub(struct gf100_ibus_priv *priv, int i)
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gf100_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x122120 + (i * 0x0400));
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u32 data = nv_rd32(priv, 0x122124 + (i * 0x0400));
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u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0400));
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nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0400));
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u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0400));
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u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0400));
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nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x122128 + (i * 0x0400), 0x00000200, 0x00000000);
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}
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static void
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gf100_ibus_intr_rop(struct gf100_ibus_priv *priv, int i)
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gf100_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x124120 + (i * 0x0400));
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u32 data = nv_rd32(priv, 0x124124 + (i * 0x0400));
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u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0400));
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nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0400));
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u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0400));
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u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0400));
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nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x124128 + (i * 0x0400), 0x00000200, 0x00000000);
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}
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static void
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gf100_ibus_intr_gpc(struct gf100_ibus_priv *priv, int i)
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gf100_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x128120 + (i * 0x0400));
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u32 data = nv_rd32(priv, 0x128124 + (i * 0x0400));
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u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0400));
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nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0400));
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u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0400));
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u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0400));
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nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x128128 + (i * 0x0400), 0x00000200, 0x00000000);
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}
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static void
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gf100_ibus_intr(struct nvkm_subdev *subdev)
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{
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struct gf100_ibus_priv *priv = (void *)subdev;
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u32 intr0 = nv_rd32(priv, 0x121c58);
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u32 intr1 = nv_rd32(priv, 0x121c5c);
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u32 hubnr = nv_rd32(priv, 0x121c70);
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u32 ropnr = nv_rd32(priv, 0x121c74);
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u32 gpcnr = nv_rd32(priv, 0x121c78);
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struct nvkm_ibus *ibus = (void *)subdev;
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u32 intr0 = nv_rd32(ibus, 0x121c58);
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u32 intr1 = nv_rd32(ibus, 0x121c5c);
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u32 hubnr = nv_rd32(ibus, 0x121c70);
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u32 ropnr = nv_rd32(ibus, 0x121c74);
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u32 gpcnr = nv_rd32(ibus, 0x121c78);
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u32 i;
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for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
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u32 stat = 0x00000100 << i;
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if (intr0 & stat) {
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gf100_ibus_intr_hub(priv, i);
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gf100_ibus_intr_hub(ibus, i);
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intr0 &= ~stat;
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}
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}
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@ -79,7 +75,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev)
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for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) {
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u32 stat = 0x00010000 << i;
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if (intr0 & stat) {
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gf100_ibus_intr_rop(priv, i);
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gf100_ibus_intr_rop(ibus, i);
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intr0 &= ~stat;
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}
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}
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@ -87,7 +83,7 @@ gf100_ibus_intr(struct nvkm_subdev *subdev)
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for (i = 0; intr1 && i < gpcnr; i++) {
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u32 stat = 0x00000001 << i;
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if (intr1 & stat) {
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gf100_ibus_intr_gpc(priv, i);
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gf100_ibus_intr_gpc(ibus, i);
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intr1 &= ~stat;
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}
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}
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@ -98,15 +94,15 @@ gf100_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct gf100_ibus_priv *priv;
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struct nvkm_ibus *ibus;
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int ret;
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ret = nvkm_ibus_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
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*pobject = nv_object(ibus);
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if (ret)
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return ret;
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nv_subdev(priv)->intr = gf100_ibus_intr;
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nv_subdev(ibus)->intr = gf100_ibus_intr;
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return 0;
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}
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@ -23,55 +23,51 @@
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*/
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#include <subdev/ibus.h>
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struct gk104_ibus_priv {
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struct nvkm_ibus base;
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};
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static void
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gk104_ibus_intr_hub(struct gk104_ibus_priv *priv, int i)
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gk104_ibus_intr_hub(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x122120 + (i * 0x0800));
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u32 data = nv_rd32(priv, 0x122124 + (i * 0x0800));
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u32 stat = nv_rd32(priv, 0x122128 + (i * 0x0800));
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nv_error(priv, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x122120 + (i * 0x0800));
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u32 data = nv_rd32(ibus, 0x122124 + (i * 0x0800));
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u32 stat = nv_rd32(ibus, 0x122128 + (i * 0x0800));
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nv_error(ibus, "HUB%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x122128 + (i * 0x0800), 0x00000200, 0x00000000);
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}
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static void
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gk104_ibus_intr_rop(struct gk104_ibus_priv *priv, int i)
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gk104_ibus_intr_rop(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x124120 + (i * 0x0800));
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u32 data = nv_rd32(priv, 0x124124 + (i * 0x0800));
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u32 stat = nv_rd32(priv, 0x124128 + (i * 0x0800));
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nv_error(priv, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x124120 + (i * 0x0800));
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u32 data = nv_rd32(ibus, 0x124124 + (i * 0x0800));
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u32 stat = nv_rd32(ibus, 0x124128 + (i * 0x0800));
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nv_error(ibus, "ROP%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x124128 + (i * 0x0800), 0x00000200, 0x00000000);
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}
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static void
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gk104_ibus_intr_gpc(struct gk104_ibus_priv *priv, int i)
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gk104_ibus_intr_gpc(struct nvkm_ibus *ibus, int i)
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{
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u32 addr = nv_rd32(priv, 0x128120 + (i * 0x0800));
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u32 data = nv_rd32(priv, 0x128124 + (i * 0x0800));
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u32 stat = nv_rd32(priv, 0x128128 + (i * 0x0800));
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nv_error(priv, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(priv, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
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u32 addr = nv_rd32(ibus, 0x128120 + (i * 0x0800));
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u32 data = nv_rd32(ibus, 0x128124 + (i * 0x0800));
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u32 stat = nv_rd32(ibus, 0x128128 + (i * 0x0800));
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nv_error(ibus, "GPC%d: 0x%06x 0x%08x (0x%08x)\n", i, addr, data, stat);
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nv_mask(ibus, 0x128128 + (i * 0x0800), 0x00000200, 0x00000000);
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}
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static void
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gk104_ibus_intr(struct nvkm_subdev *subdev)
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{
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struct gk104_ibus_priv *priv = (void *)subdev;
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u32 intr0 = nv_rd32(priv, 0x120058);
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u32 intr1 = nv_rd32(priv, 0x12005c);
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u32 hubnr = nv_rd32(priv, 0x120070);
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u32 ropnr = nv_rd32(priv, 0x120074);
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u32 gpcnr = nv_rd32(priv, 0x120078);
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struct nvkm_ibus *ibus = (void *)subdev;
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u32 intr0 = nv_rd32(ibus, 0x120058);
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u32 intr1 = nv_rd32(ibus, 0x12005c);
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u32 hubnr = nv_rd32(ibus, 0x120070);
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u32 ropnr = nv_rd32(ibus, 0x120074);
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u32 gpcnr = nv_rd32(ibus, 0x120078);
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u32 i;
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for (i = 0; (intr0 & 0x0000ff00) && i < hubnr; i++) {
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u32 stat = 0x00000100 << i;
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if (intr0 & stat) {
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gk104_ibus_intr_hub(priv, i);
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gk104_ibus_intr_hub(ibus, i);
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intr0 &= ~stat;
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}
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}
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@ -79,7 +75,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
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for (i = 0; (intr0 & 0xffff0000) && i < ropnr; i++) {
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u32 stat = 0x00010000 << i;
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if (intr0 & stat) {
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gk104_ibus_intr_rop(priv, i);
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gk104_ibus_intr_rop(ibus, i);
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intr0 &= ~stat;
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}
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}
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@ -87,7 +83,7 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
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for (i = 0; intr1 && i < gpcnr; i++) {
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u32 stat = 0x00000001 << i;
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if (intr1 & stat) {
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gk104_ibus_intr_gpc(priv, i);
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gk104_ibus_intr_gpc(ibus, i);
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intr1 &= ~stat;
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}
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}
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@ -96,16 +92,16 @@ gk104_ibus_intr(struct nvkm_subdev *subdev)
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static int
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gk104_ibus_init(struct nvkm_object *object)
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{
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struct gk104_ibus_priv *priv = (void *)object;
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int ret = nvkm_ibus_init(&priv->base);
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struct nvkm_ibus *ibus = (void *)object;
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int ret = nvkm_ibus_init(ibus);
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if (ret == 0) {
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nv_mask(priv, 0x122318, 0x0003ffff, 0x00001000);
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nv_mask(priv, 0x12231c, 0x0003ffff, 0x00000200);
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nv_mask(priv, 0x122310, 0x0003ffff, 0x00000800);
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nv_mask(priv, 0x122348, 0x0003ffff, 0x00000100);
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nv_mask(priv, 0x1223b0, 0x0003ffff, 0x00000fff);
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nv_mask(priv, 0x122348, 0x0003ffff, 0x00000200);
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nv_mask(priv, 0x122358, 0x0003ffff, 0x00002880);
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nv_mask(ibus, 0x122318, 0x0003ffff, 0x00001000);
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nv_mask(ibus, 0x12231c, 0x0003ffff, 0x00000200);
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nv_mask(ibus, 0x122310, 0x0003ffff, 0x00000800);
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nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000100);
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nv_mask(ibus, 0x1223b0, 0x0003ffff, 0x00000fff);
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nv_mask(ibus, 0x122348, 0x0003ffff, 0x00000200);
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nv_mask(ibus, 0x122358, 0x0003ffff, 0x00002880);
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}
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return ret;
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}
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@ -115,15 +111,15 @@ gk104_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
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struct nvkm_oclass *oclass, void *data, u32 size,
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struct nvkm_object **pobject)
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{
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struct gk104_ibus_priv *priv;
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struct nvkm_ibus *ibus;
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int ret;
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ret = nvkm_ibus_create(parent, engine, oclass, &priv);
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*pobject = nv_object(priv);
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ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
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*pobject = nv_object(ibus);
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if (ret)
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return ret;
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nv_subdev(priv)->intr = gk104_ibus_intr;
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nv_subdev(ibus)->intr = gk104_ibus_intr;
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return 0;
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}
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@ -22,61 +22,57 @@
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#include <subdev/ibus.h>
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#include <subdev/timer.h>
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struct gk20a_ibus_priv {
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struct nvkm_ibus base;
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};
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static void
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gk20a_ibus_init_priv_ring(struct gk20a_ibus_priv *priv)
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gk20a_ibus_init_ibus_ring(struct nvkm_ibus *ibus)
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{
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nv_mask(priv, 0x137250, 0x3f, 0);
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nv_mask(ibus, 0x137250, 0x3f, 0);
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nv_mask(priv, 0x000200, 0x20, 0);
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nv_mask(ibus, 0x000200, 0x20, 0);
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usleep_range(20, 30);
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nv_mask(priv, 0x000200, 0x20, 0x20);
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nv_mask(ibus, 0x000200, 0x20, 0x20);
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nv_wr32(priv, 0x12004c, 0x4);
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nv_wr32(priv, 0x122204, 0x2);
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nv_rd32(priv, 0x122204);
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nv_wr32(ibus, 0x12004c, 0x4);
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nv_wr32(ibus, 0x122204, 0x2);
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nv_rd32(ibus, 0x122204);
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/*
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* Bug: increase clock timeout to avoid operation failure at high
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* gpcclk rate.
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*/
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nv_wr32(priv, 0x122354, 0x800);
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nv_wr32(priv, 0x128328, 0x800);
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nv_wr32(priv, 0x124320, 0x800);
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nv_wr32(ibus, 0x122354, 0x800);
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nv_wr32(ibus, 0x128328, 0x800);
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nv_wr32(ibus, 0x124320, 0x800);
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}
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static void
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gk20a_ibus_intr(struct nvkm_subdev *subdev)
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{
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struct gk20a_ibus_priv *priv = (void *)subdev;
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u32 status0 = nv_rd32(priv, 0x120058);
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struct nvkm_ibus *ibus = (void *)subdev;
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u32 status0 = nv_rd32(ibus, 0x120058);
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if (status0 & 0x7) {
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nv_debug(priv, "resetting priv ring\n");
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gk20a_ibus_init_priv_ring(priv);
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nv_debug(ibus, "resetting ibus ring\n");
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gk20a_ibus_init_ibus_ring(ibus);
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}
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/* Acknowledge interrupt */
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nv_mask(priv, 0x12004c, 0x2, 0x2);
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nv_mask(ibus, 0x12004c, 0x2, 0x2);
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if (!nv_wait(subdev, 0x12004c, 0x3f, 0x00))
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nv_warn(priv, "timeout waiting for ringmaster ack\n");
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nv_warn(ibus, "timeout waiting for ringmaster ack\n");
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}
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static int
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gk20a_ibus_init(struct nvkm_object *object)
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||||
{
|
||||
struct gk20a_ibus_priv *priv = (void *)object;
|
||||
struct nvkm_ibus *ibus = (void *)object;
|
||||
int ret;
|
||||
|
||||
ret = _nvkm_ibus_init(object);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
gk20a_ibus_init_priv_ring(priv);
|
||||
gk20a_ibus_init_ibus_ring(ibus);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -86,15 +82,15 @@ gk20a_ibus_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
|
|||
struct nvkm_oclass *oclass, void *data, u32 size,
|
||||
struct nvkm_object **pobject)
|
||||
{
|
||||
struct gk20a_ibus_priv *priv;
|
||||
struct nvkm_ibus *ibus;
|
||||
int ret;
|
||||
|
||||
ret = nvkm_ibus_create(parent, engine, oclass, &priv);
|
||||
*pobject = nv_object(priv);
|
||||
ret = nvkm_ibus_create(parent, engine, oclass, &ibus);
|
||||
*pobject = nv_object(ibus);
|
||||
if (ret)
|
||||
return ret;
|
||||
|
||||
nv_subdev(priv)->intr = gk20a_ibus_intr;
|
||||
nv_subdev(ibus)->intr = gk20a_ibus_intr;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
|
|
|||
Loading…
Reference in New Issue