xhci: Fix TRB prefetch issue of ZHAOXIN hosts
mainline inclusion from mainline-v6.4-rc5 commit <2a865a652299f5666f3b785cbe758c5f57453036> ------------------- On some ZHAOXIN hosts, xHCI will prefetch TRB for performance improvement. However this TRB prefetch mechanism may cross page boundary, which may access memory not allocated by xHCI driver. In order to fix this issue, two pages was allocated for a segment and only the first page will be used. And add a quirk XHCI_ZHAOXIN_TRB_FETCH for this issue. Cc: stable@vger.kernel.org Signed-off-by: Weitao Wang <WeitaoWang-oc@zhaoxin.com> Signed-off-by: Mathias Nyman <mathias.nyman@linux.intel.com> Message-ID: <20230602144009.1225632-10-mathias.nyman@linux.intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: leoliu-oc <leoliu-oc@zhaoxin.com>
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@ -2456,8 +2456,12 @@ int xhci_mem_init(struct xhci_hcd *xhci, gfp_t flags)
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* and our use of dma addresses in the trb_address_map radix tree needs
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* TRB_SEGMENT_SIZE alignment, so we pick the greater alignment need.
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*/
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xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
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TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
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if (xhci->quirks & XHCI_ZHAOXIN_TRB_FETCH)
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xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
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TRB_SEGMENT_SIZE * 2, TRB_SEGMENT_SIZE * 2, xhci->page_size * 2);
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else
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xhci->segment_pool = dma_pool_create("xHCI ring segments", dev,
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TRB_SEGMENT_SIZE, TRB_SEGMENT_SIZE, xhci->page_size);
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/* See Table 46 and Note on Figure 55 */
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xhci->device_pool = dma_pool_create("xHCI input/output contexts", dev,
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@ -323,8 +323,13 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
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xhci->quirks |= XHCI_DEFAULT_PM_RUNTIME_ALLOW;
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if (pdev->vendor == PCI_VENDOR_ID_ZHAOXIN) {
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if (pdev->device == 0x9202)
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if (pdev->device == 0x9202) {
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xhci->quirks |= XHCI_RESET_ON_RESUME;
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xhci->quirks |= XHCI_ZHAOXIN_TRB_FETCH;
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}
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if (pdev->device == 0x9203)
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xhci->quirks |= XHCI_ZHAOXIN_TRB_FETCH;
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}
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if (xhci->quirks & XHCI_RESET_ON_RESUME)
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@ -1885,6 +1885,7 @@ struct xhci_hcd {
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#define XHCI_SKIP_PHY_INIT BIT_ULL(37)
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#define XHCI_DISABLE_SPARSE BIT_ULL(38)
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#define XHCI_NO_SOFT_RETRY BIT_ULL(40)
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#define XHCI_ZHAOXIN_TRB_FETCH BIT_ULL(45)
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unsigned int num_active_eps;
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unsigned int limit_active_eps;
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