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arm64: dts: qcom: sm8150: add i2c and spi dma channels 

By listing relevant DMA channels for the various QUPv3 instances, we
can work on adding support for DMA to the respective drivers.

Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com>
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20211216124348.370059-1-balbi@kernel.org
This commit is contained in:
Felipe Balbi 2021-12-16 14:43:48 +02:00 committed by Bjorn Andersson
parent 63a4021fef
commit abdd4b7a7a
1 changed files with 120 additions and 0 deletions
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120
arch/arm64/boot/dts/qcom/sm8150.dtsi
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@ -932,6 +932,9 @@
reg = <0 0x00880000 0 0x4000>; reg = <0 0x00880000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
dmas = <&gpi_dma0 0 0 QCOM_GPI_I2C>,
<&gpi_dma0 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c0_default>; pinctrl-0 = <&qup_i2c0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
@ -946,6 +949,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
dmas = <&gpi_dma0 0 0 QCOM_GPI_SPI>,
<&gpi_dma0 1 0 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi0_default>; pinctrl-0 = <&qup_spi0_default>;
interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 601 IRQ_TYPE_LEVEL_HIGH>;
@ -960,6 +966,9 @@
reg = <0 0x00884000 0 0x4000>; reg = <0 0x00884000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_I2C>,
<&gpi_dma0 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c1_default>; pinctrl-0 = <&qup_i2c1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
@ -974,6 +983,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S1_CLK>;
dmas = <&gpi_dma0 0 1 QCOM_GPI_SPI>,
<&gpi_dma0 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi1_default>; pinctrl-0 = <&qup_spi1_default>;
interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 602 IRQ_TYPE_LEVEL_HIGH>;
@ -988,6 +1000,9 @@
reg = <0 0x00888000 0 0x4000>; reg = <0 0x00888000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
dmas = <&gpi_dma0 0 2 QCOM_GPI_I2C>,
<&gpi_dma0 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c2_default>; pinctrl-0 = <&qup_i2c2_default>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
@ -1002,6 +1017,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S2_CLK>;
dmas = <&gpi_dma0 0 2 QCOM_GPI_SPI>,
<&gpi_dma0 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi2_default>; pinctrl-0 = <&qup_spi2_default>;
interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 603 IRQ_TYPE_LEVEL_HIGH>;
@ -1016,6 +1034,9 @@
reg = <0 0x0088c000 0 0x4000>; reg = <0 0x0088c000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
dmas = <&gpi_dma0 0 3 QCOM_GPI_I2C>,
<&gpi_dma0 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c3_default>; pinctrl-0 = <&qup_i2c3_default>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
@ -1030,6 +1051,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S3_CLK>;
dmas = <&gpi_dma0 0 3 QCOM_GPI_SPI>,
<&gpi_dma0 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi3_default>; pinctrl-0 = <&qup_spi3_default>;
interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 604 IRQ_TYPE_LEVEL_HIGH>;
@ -1044,6 +1068,9 @@
reg = <0 0x00890000 0 0x4000>; reg = <0 0x00890000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
dmas = <&gpi_dma0 0 4 QCOM_GPI_I2C>,
<&gpi_dma0 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c4_default>; pinctrl-0 = <&qup_i2c4_default>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
@ -1058,6 +1085,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S4_CLK>;
dmas = <&gpi_dma0 0 4 QCOM_GPI_SPI>,
<&gpi_dma0 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi4_default>; pinctrl-0 = <&qup_spi4_default>;
interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 605 IRQ_TYPE_LEVEL_HIGH>;
@ -1072,6 +1102,9 @@
reg = <0 0x00894000 0 0x4000>; reg = <0 0x00894000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
dmas = <&gpi_dma0 0 5 QCOM_GPI_I2C>,
<&gpi_dma0 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c5_default>; pinctrl-0 = <&qup_i2c5_default>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
@ -1086,6 +1119,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S5_CLK>;
dmas = <&gpi_dma0 0 5 QCOM_GPI_SPI>,
<&gpi_dma0 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi5_default>; pinctrl-0 = <&qup_spi5_default>;
interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 606 IRQ_TYPE_LEVEL_HIGH>;
@ -1100,6 +1136,9 @@
reg = <0 0x00898000 0 0x4000>; reg = <0 0x00898000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
dmas = <&gpi_dma0 0 6 QCOM_GPI_I2C>,
<&gpi_dma0 1 6 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c6_default>; pinctrl-0 = <&qup_i2c6_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
@ -1114,6 +1153,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S6_CLK>;
dmas = <&gpi_dma0 0 6 QCOM_GPI_SPI>,
<&gpi_dma0 1 6 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi6_default>; pinctrl-0 = <&qup_spi6_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
@ -1128,6 +1170,9 @@
reg = <0 0x0089c000 0 0x4000>; reg = <0 0x0089c000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
dmas = <&gpi_dma0 0 7 QCOM_GPI_I2C>,
<&gpi_dma0 1 7 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c7_default>; pinctrl-0 = <&qup_i2c7_default>;
interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 607 IRQ_TYPE_LEVEL_HIGH>;
@ -1142,6 +1187,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>; clocks = <&gcc GCC_QUPV3_WRAP0_S7_CLK>;
dmas = <&gpi_dma0 0 7 QCOM_GPI_SPI>,
<&gpi_dma0 1 7 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi7_default>; pinctrl-0 = <&qup_spi7_default>;
interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>;
@ -1192,6 +1240,9 @@
reg = <0 0x00a80000 0 0x4000>; reg = <0 0x00a80000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
dmas = <&gpi_dma1 0 0 QCOM_GPI_I2C>,
<&gpi_dma1 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c8_default>; pinctrl-0 = <&qup_i2c8_default>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
@ -1206,6 +1257,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S0_CLK>;
dmas = <&gpi_dma1 0 0 QCOM_GPI_SPI>,
<&gpi_dma1 1 0 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi8_default>; pinctrl-0 = <&qup_spi8_default>;
interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
@ -1220,6 +1274,9 @@
reg = <0 0x00a84000 0 0x4000>; reg = <0 0x00a84000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
dmas = <&gpi_dma1 0 1 QCOM_GPI_I2C>,
<&gpi_dma1 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c9_default>; pinctrl-0 = <&qup_i2c9_default>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
@ -1234,6 +1291,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S1_CLK>;
dmas = <&gpi_dma1 0 1 QCOM_GPI_SPI>,
<&gpi_dma1 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi9_default>; pinctrl-0 = <&qup_spi9_default>;
interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
@ -1248,6 +1308,9 @@
reg = <0 0x00a88000 0 0x4000>; reg = <0 0x00a88000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
dmas = <&gpi_dma1 0 2 QCOM_GPI_I2C>,
<&gpi_dma1 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c10_default>; pinctrl-0 = <&qup_i2c10_default>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
@ -1262,6 +1325,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S2_CLK>;
dmas = <&gpi_dma1 0 2 QCOM_GPI_SPI>,
<&gpi_dma1 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi10_default>; pinctrl-0 = <&qup_spi10_default>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
@ -1276,6 +1342,9 @@
reg = <0 0x00a8c000 0 0x4000>; reg = <0 0x00a8c000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
dmas = <&gpi_dma1 0 3 QCOM_GPI_I2C>,
<&gpi_dma1 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c11_default>; pinctrl-0 = <&qup_i2c11_default>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
@ -1290,6 +1359,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S3_CLK>;
dmas = <&gpi_dma1 0 3 QCOM_GPI_SPI>,
<&gpi_dma1 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi11_default>; pinctrl-0 = <&qup_spi11_default>;
interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
@ -1313,6 +1385,9 @@
reg = <0 0x00a90000 0 0x4000>; reg = <0 0x00a90000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
dmas = <&gpi_dma1 0 4 QCOM_GPI_I2C>,
<&gpi_dma1 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c12_default>; pinctrl-0 = <&qup_i2c12_default>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
@ -1327,6 +1402,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S4_CLK>;
dmas = <&gpi_dma1 0 4 QCOM_GPI_SPI>,
<&gpi_dma1 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi12_default>; pinctrl-0 = <&qup_spi12_default>;
interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
@ -1341,6 +1419,9 @@
reg = <0 0x0094000 0 0x4000>; reg = <0 0x0094000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
<&gpi_dma2 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c16_default>; pinctrl-0 = <&qup_i2c16_default>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
@ -1355,6 +1436,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP1_S5_CLK>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
<&gpi_dma2 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi16_default>; pinctrl-0 = <&qup_spi16_default>;
interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
@ -1406,6 +1490,9 @@
reg = <0 0x00c80000 0 0x4000>; reg = <0 0x00c80000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
dmas = <&gpi_dma2 0 0 QCOM_GPI_I2C>,
<&gpi_dma2 1 0 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c17_default>; pinctrl-0 = <&qup_i2c17_default>;
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
@ -1420,6 +1507,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S0_CLK>;
dmas = <&gpi_dma2 0 0 QCOM_GPI_SPI>,
<&gpi_dma2 1 0 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi17_default>; pinctrl-0 = <&qup_spi17_default>;
interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
@ -1434,6 +1524,9 @@
reg = <0 0x00c84000 0 0x4000>; reg = <0 0x00c84000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
dmas = <&gpi_dma2 0 1 QCOM_GPI_I2C>,
<&gpi_dma2 1 1 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c18_default>; pinctrl-0 = <&qup_i2c18_default>;
interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
@ -1448,6 +1541,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S1_CLK>;
dmas = <&gpi_dma2 0 1 QCOM_GPI_SPI>,
<&gpi_dma2 1 1 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi18_default>; pinctrl-0 = <&qup_spi18_default>;
interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 583 IRQ_TYPE_LEVEL_HIGH>;
@ -1462,6 +1558,9 @@
reg = <0 0x00c88000 0 0x4000>; reg = <0 0x00c88000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_I2C>,
<&gpi_dma2 1 2 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c19_default>; pinctrl-0 = <&qup_i2c19_default>;
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
@ -1476,6 +1575,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S2_CLK>;
dmas = <&gpi_dma2 0 2 QCOM_GPI_SPI>,
<&gpi_dma2 1 2 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi19_default>; pinctrl-0 = <&qup_spi19_default>;
interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 584 IRQ_TYPE_LEVEL_HIGH>;
@ -1490,6 +1592,9 @@
reg = <0 0x00c8c000 0 0x4000>; reg = <0 0x00c8c000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
dmas = <&gpi_dma2 0 3 QCOM_GPI_I2C>,
<&gpi_dma2 1 3 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c13_default>; pinctrl-0 = <&qup_i2c13_default>;
interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
@ -1504,6 +1609,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S3_CLK>;
dmas = <&gpi_dma2 0 3 QCOM_GPI_SPI>,
<&gpi_dma2 1 3 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi13_default>; pinctrl-0 = <&qup_spi13_default>;
interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 585 IRQ_TYPE_LEVEL_HIGH>;
@ -1518,6 +1626,9 @@
reg = <0 0x00c90000 0 0x4000>; reg = <0 0x00c90000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
dmas = <&gpi_dma2 0 4 QCOM_GPI_I2C>,
<&gpi_dma2 1 4 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c14_default>; pinctrl-0 = <&qup_i2c14_default>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
@ -1532,6 +1643,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S4_CLK>;
dmas = <&gpi_dma2 0 4 QCOM_GPI_SPI>,
<&gpi_dma2 1 4 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi14_default>; pinctrl-0 = <&qup_spi14_default>;
interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 586 IRQ_TYPE_LEVEL_HIGH>;
@ -1546,6 +1660,9 @@
reg = <0 0x00c94000 0 0x4000>; reg = <0 0x00c94000 0 0x4000>;
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_I2C>,
<&gpi_dma2 1 5 QCOM_GPI_I2C>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_i2c15_default>; pinctrl-0 = <&qup_i2c15_default>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
@ -1560,6 +1677,9 @@
reg-names = "se"; reg-names = "se";
clock-names = "se"; clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>; clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
dmas = <&gpi_dma2 0 5 QCOM_GPI_SPI>,
<&gpi_dma2 1 5 QCOM_GPI_SPI>;
dma-names = "tx", "rx";
pinctrl-names = "default"; pinctrl-names = "default";
pinctrl-0 = <&qup_spi15_default>; pinctrl-0 = <&qup_spi15_default>;
interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>; interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;