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iio: mxs-lradc: add write_raw function to modify scale 

Added write_raw function to manipulate the optional divider_by_two
through the scaling attribute out of the available scales.

Signed-off-by: Hector Palacios <hector.palacios@digi.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
Acked-by: Marek Vasut <marex@denx.de>
Signed-off-by: Jonathan Cameron <jic23@kernel.org>
This commit is contained in:
Hector Palacios 2013-12-23 17:48:00 +00:00 committed by Jonathan Cameron
parent d5acf5942b
commit aba70f2a58
1 changed files with 61 additions and 1 deletions
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62
drivers/staging/iio/adc/mxs-lradc.c
View File

@ -185,6 +185,11 @@ enum lradc_ts_plate {
LRADC_SAMPLE_VALID, LRADC_SAMPLE_VALID,
}; };
enum mxs_lradc_divbytwo {
MXS_LRADC_DIV_DISABLED = 0,
MXS_LRADC_DIV_ENABLED,
};
struct mxs_lradc_scale { struct mxs_lradc_scale {
unsigned int integer; unsigned int integer;
unsigned int nano; unsigned int nano;
@ -206,6 +211,7 @@ struct mxs_lradc {
const uint32_t *vref_mv; const uint32_t *vref_mv;
struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2]; struct mxs_lradc_scale scale_avail[LRADC_MAX_TOTAL_CHANS][2];
unsigned int is_divided[LRADC_MAX_TOTAL_CHANS];
/* /*
* Touchscreen LRADC channels receives a private slot in the CTRL4 * Touchscreen LRADC channels receives a private slot in the CTRL4
@ -295,6 +301,7 @@ struct mxs_lradc {
#define LRADC_CTRL1_LRADC_IRQ_OFFSET 0 #define LRADC_CTRL1_LRADC_IRQ_OFFSET 0
#define LRADC_CTRL2 0x20 #define LRADC_CTRL2 0x20
#define LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET 24
#define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15) #define LRADC_CTRL2_TEMPSENSE_PWD (1 << 15)
#define LRADC_STATUS 0x40 #define LRADC_STATUS 0x40
@ -912,7 +919,8 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
} }
*val = lradc->vref_mv[chan->channel]; *val = lradc->vref_mv[chan->channel];
*val2 = chan->scan_type.realbits; *val2 = chan->scan_type.realbits -
lradc->is_divided[chan->channel];
return IIO_VAL_FRACTIONAL_LOG2; return IIO_VAL_FRACTIONAL_LOG2;
case IIO_CHAN_INFO_OFFSET: case IIO_CHAN_INFO_OFFSET:
@ -936,6 +944,56 @@ static int mxs_lradc_read_raw(struct iio_dev *iio_dev,
return -EINVAL; return -EINVAL;
} }
static int mxs_lradc_write_raw(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
int val, int val2, long m)
{
struct mxs_lradc *lradc = iio_priv(iio_dev);
struct mxs_lradc_scale *scale_avail =
lradc->scale_avail[chan->channel];
int ret;
ret = mutex_trylock(&lradc->lock);
if (!ret)
return -EBUSY;
switch (m) {
case IIO_CHAN_INFO_SCALE:
ret = -EINVAL;
if (val == scale_avail[MXS_LRADC_DIV_DISABLED].integer &&
val2 == scale_avail[MXS_LRADC_DIV_DISABLED].nano) {
/* divider by two disabled */
writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_CLR);
lradc->is_divided[chan->channel] = 0;
ret = 0;
} else if (val == scale_avail[MXS_LRADC_DIV_ENABLED].integer &&
val2 == scale_avail[MXS_LRADC_DIV_ENABLED].nano) {
/* divider by two enabled */
writel(1 << LRADC_CTRL2_DIVIDE_BY_TWO_OFFSET,
lradc->base + LRADC_CTRL2 + STMP_OFFSET_REG_SET);
lradc->is_divided[chan->channel] = 1;
ret = 0;
}
break;
default:
ret = -EINVAL;
break;
}
mutex_unlock(&lradc->lock);
return ret;
}
static int mxs_lradc_write_raw_get_fmt(struct iio_dev *iio_dev,
const struct iio_chan_spec *chan,
long m)
{
return IIO_VAL_INT_PLUS_NANO;
}
static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev, static ssize_t mxs_lradc_show_scale_available_ch(struct device *dev,
struct device_attribute *attr, struct device_attribute *attr,
char *buf, char *buf,
@ -1013,6 +1071,8 @@ static const struct attribute_group mxs_lradc_attribute_group = {
static const struct iio_info mxs_lradc_iio_info = { static const struct iio_info mxs_lradc_iio_info = {
.driver_module = THIS_MODULE, .driver_module = THIS_MODULE,
.read_raw = mxs_lradc_read_raw, .read_raw = mxs_lradc_read_raw,
.write_raw = mxs_lradc_write_raw,
.write_raw_get_fmt = mxs_lradc_write_raw_get_fmt,
.attrs = &mxs_lradc_attribute_group, .attrs = &mxs_lradc_attribute_group,
}; };