drm/nv50/disp: copy caps to evo
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -249,14 +249,52 @@ nv50_disp_base_dtor(struct nouveau_object *object)
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static int
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nv50_disp_base_init(struct nouveau_object *object)
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{
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struct nv50_disp_priv *priv = (void *)object->engine;
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struct nv50_disp_base *base = (void *)object;
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int ret;
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int ret, i;
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u32 tmp;
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ret = nouveau_parent_init(&base->base);
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if (ret)
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return ret;
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/* caps */
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/* The below segments of code copying values from one register to
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* another appear to inform EVO of the display capabilities or
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* something similar. NFI what the 0x614004 caps are for..
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*/
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tmp = nv_rd32(priv, 0x614004);
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nv_wr32(priv, 0x610184, tmp);
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/* ... CRTC caps */
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for (i = 0; i < priv->head.nr; i++) {
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tmp = nv_rd32(priv, 0x616100 + (i * 0x800));
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nv_wr32(priv, 0x610190 + (i * 0x10), tmp);
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tmp = nv_rd32(priv, 0x616104 + (i * 0x800));
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nv_wr32(priv, 0x610194 + (i * 0x10), tmp);
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tmp = nv_rd32(priv, 0x616108 + (i * 0x800));
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nv_wr32(priv, 0x610198 + (i * 0x10), tmp);
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tmp = nv_rd32(priv, 0x61610c + (i * 0x800));
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nv_wr32(priv, 0x61019c + (i * 0x10), tmp);
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}
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/* ... DAC caps */
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for (i = 0; i < priv->dac.nr; i++) {
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tmp = nv_rd32(priv, 0x61a000 + (i * 0x800));
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nv_wr32(priv, 0x6101d0 + (i * 0x04), tmp);
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}
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/* ... SOR caps */
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for (i = 0; i < priv->sor.nr; i++) {
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tmp = nv_rd32(priv, 0x61c000 + (i * 0x800));
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nv_wr32(priv, 0x6101e0 + (i * 0x04), tmp);
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}
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/* ... EXT caps */
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for (i = 0; i < 3; i++) {
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tmp = nv_rd32(priv, 0x61e000 + (i * 0x800));
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nv_wr32(priv, 0x6101f0 + (i * 0x04), tmp);
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}
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/* intr 100 */
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/* 6194e8 shit */
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/* intr */
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