staging: octeon-usb: cvmx-usb.c: make comments to fit into 80 columns
Make comments to fit into 80 columns. Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
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@ -20,16 +20,16 @@
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* derived from this software without specific prior written
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* permission.
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* This Software, including technical data, may be subject to U.S. export control
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* laws, including the U.S. Export Administration Act and its associated
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* This Software, including technical data, may be subject to U.S. export
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* control laws, including the U.S. Export Administration Act and its associated
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* regulations, and may be subject to export or import regulations in other
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* countries.
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* TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS"
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* AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR
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* WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION OR
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* DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION
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* OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM
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* SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE,
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* MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF
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* VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR
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@ -60,15 +60,38 @@
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/* Normal prefetch that use the pref instruction. */
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#define CVMX_PREFETCH(address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (0))
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#define MAX_RETRIES 3 /* Maximum number of times to retry failed transactions */
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#define MAX_PIPES 32 /* Maximum number of pipes that can be open at once */
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#define MAX_TRANSACTIONS 256 /* Maximum number of outstanding transactions across all pipes */
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#define MAX_CHANNELS 8 /* Maximum number of hardware channels supported by the USB block */
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#define MAX_USB_ADDRESS 127 /* The highest valid USB device address */
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#define MAX_USB_ENDPOINT 15 /* The highest valid USB endpoint number */
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#define MAX_USB_HUB_PORT 15 /* The highest valid port number on a hub */
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#define MAX_TRANSFER_BYTES ((1<<19)-1) /* The low level hardware can transfer a maximum of this number of bytes in each transfer. The field is 19 bits wide */
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#define MAX_TRANSFER_PACKETS ((1<<10)-1) /* The low level hardware can transfer a maximum of this number of packets in each transfer. The field is 10 bits wide */
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/* Maximum number of times to retry failed transactions */
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#define MAX_RETRIES 3
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/* Maximum number of pipes that can be open at once */
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#define MAX_PIPES 32
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/* Maximum number of outstanding transactions across all pipes */
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#define MAX_TRANSACTIONS 256
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/* Maximum number of hardware channels supported by the USB block */
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#define MAX_CHANNELS 8
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/* The highest valid USB device address */
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#define MAX_USB_ADDRESS 127
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/* The highest valid USB endpoint number */
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#define MAX_USB_ENDPOINT 15
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/* The highest valid port number on a hub */
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#define MAX_USB_HUB_PORT 15
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/*
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* The low level hardware can transfer a maximum of this number of bytes in each
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* transfer. The field is 19 bits wide
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*/
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#define MAX_TRANSFER_BYTES ((1<<19)-1)
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/*
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* The low level hardware can transfer a maximum of this number of packets in
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* each transfer. The field is 10 bits wide
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*/
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#define MAX_TRANSFER_PACKETS ((1<<10)-1)
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enum cvmx_usb_transaction_flags {
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__CVMX_USB_TRANSACTION_FLAGS_IN_USE = 1<<16,
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@ -622,12 +645,15 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number)
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* Most Octeon evaluation boards require this setting
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
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usbn_clk_ctl.cn31xx.p_rclk = 1; /* From CN31XX,CN30XX manual */
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/* From CN31XX,CN30XX manual */
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usbn_clk_ctl.cn31xx.p_rclk = 1;
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usbn_clk_ctl.cn31xx.p_xenbn = 0;
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} else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
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usbn_clk_ctl.cn56xx.p_rtype = 2; /* From CN56XX,CN50XX manual */
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/* From CN56XX,CN50XX manual */
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usbn_clk_ctl.cn56xx.p_rtype = 2;
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else
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usbn_clk_ctl.cn52xx.p_rtype = 1; /* From CN52XX manual */
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/* From CN52XX manual */
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usbn_clk_ctl.cn52xx.p_rtype = 1;
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switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) {
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case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ:
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@ -646,12 +672,15 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number)
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* at USB_XO and USB_XI
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*/
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if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) {
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usbn_clk_ctl.cn31xx.p_rclk = 1; /* From CN31XX,CN30XX manual */
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/* From CN31XX,CN30XX manual */
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usbn_clk_ctl.cn31xx.p_rclk = 1;
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usbn_clk_ctl.cn31xx.p_xenbn = 1;
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} else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX))
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usbn_clk_ctl.cn56xx.p_rtype = 0; /* From CN56XX,CN50XX manual */
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/* From CN56XX,CN50XX manual */
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usbn_clk_ctl.cn56xx.p_rtype = 0;
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else
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usbn_clk_ctl.cn52xx.p_rtype = 0; /* From CN52XX manual */
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/* From CN52XX manual */
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usbn_clk_ctl.cn52xx.p_rtype = 0;
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usbn_clk_ctl.s.p_c_sel = 0;
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}
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@ -662,7 +691,8 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number)
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*/
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{
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int divisor = (octeon_get_clock_rate()+125000000-1)/125000000;
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if (divisor < 4) /* Lower than 4 doesn't seem to work properly */
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/* Lower than 4 doesn't seem to work properly */
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if (divisor < 4)
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divisor = 4;
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usbn_clk_ctl.s.divide = divisor;
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usbn_clk_ctl.s.divide2 = 0;
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@ -759,9 +789,11 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number)
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usbcx_gahbcfg.u32 = 0;
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usbcx_gahbcfg.s.dmaen = !(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA);
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if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)
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usb->idle_hardware_channels = 0x1; /* Only use one channel with non DMA */
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/* Only use one channel with non DMA */
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usb->idle_hardware_channels = 0x1;
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else if (OCTEON_IS_MODEL(OCTEON_CN5XXX))
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usb->idle_hardware_channels = 0xf7; /* CN5XXX have an errata with channel 3 */
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/* CN5XXX have an errata with channel 3 */
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usb->idle_hardware_channels = 0xf7;
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else
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usb->idle_hardware_channels = 0xff;
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usbcx_gahbcfg.s.hbstlen = 0;
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@ -809,7 +841,10 @@ int cvmx_usb_initialize(struct cvmx_usb_state *state, int usb_port_number)
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index),
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usbcx_gintmsk.u32);
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/* Disable all channel interrupts. We'll enable them per channel later */
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/*
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* Disable all channel interrupts. We'll enable them per channel
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* later.
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*/
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for (channel = 0; channel < 8; channel++)
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0);
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}
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@ -932,7 +967,10 @@ int cvmx_usb_enable(struct cvmx_usb_state *state)
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prtena, ==, 1, 100000))
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return -ETIMEDOUT;
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/* Read the port speed field to get the enumerated speed, USBC_HPRT[PRTSPD]. */
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/*
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* Read the port speed field to get the enumerated speed,
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* USBC_HPRT[PRTSPD].
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*/
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usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index));
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usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GHWCFG3(usb->index));
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@ -1384,7 +1422,10 @@ static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_internal_state *usb, int cha
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if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt)
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return;
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/* Find out how many bytes we need to fill and convert it into 32bit words */
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/*
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* Find out how many bytes we need to fill and convert it into 32bit
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* words.
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*/
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usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index));
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if (!usbc_hctsiz.s.xfersize)
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return;
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@ -1577,13 +1618,19 @@ static void __cvmx_usb_start_channel(struct cvmx_usb_internal_state *usb,
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usbc_hcintmsk.u32 = 0;
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usbc_hcintmsk.s.chhltdmsk = 1;
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if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
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/* Channels need these extra interrupts when we aren't in DMA mode */
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/*
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* Channels need these extra interrupts when we aren't
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* in DMA mode.
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*/
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usbc_hcintmsk.s.datatglerrmsk = 1;
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usbc_hcintmsk.s.frmovrunmsk = 1;
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usbc_hcintmsk.s.bblerrmsk = 1;
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usbc_hcintmsk.s.xacterrmsk = 1;
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if (__cvmx_usb_pipe_needs_split(usb, pipe)) {
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/* Splits don't generate xfercompl, so we need ACK and NYET */
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/*
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* Splits don't generate xfercompl, so we need
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* ACK and NYET.
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*/
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usbc_hcintmsk.s.nyetmsk = 1;
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usbc_hcintmsk.s.ackmsk = 1;
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}
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* begin or the entire payload
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*/
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if (bytes_to_transfer <= 188)
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usbc_hcsplt.s.xactpos = 3; /* Entire payload in one go */
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/* Entire payload in one go */
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usbc_hcsplt.s.xactpos = 3;
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else
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usbc_hcsplt.s.xactpos = 2; /* First part of payload */
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/* First part of payload */
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usbc_hcsplt.s.xactpos = 2;
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} else {
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/*
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* Continuing the previous data, we must
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* either be in the middle or at the end
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*/
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if (bytes_to_transfer <= 188)
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usbc_hcsplt.s.xactpos = 1; /* End of payload */
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/* End of payload */
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usbc_hcsplt.s.xactpos = 1;
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else
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usbc_hcsplt.s.xactpos = 0; /* Middle of payload */
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/* Middle of payload */
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usbc_hcsplt.s.xactpos = 0;
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}
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/*
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* Again, the transfer size is limited to 188
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enum cvmx_usb_transfer ttype;
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if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) {
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/* Without DMA we need to be careful to not schedule something at the end of a frame and cause an overrun */
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/*
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* Without DMA we need to be careful to not schedule something
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* at the end of a frame and cause an overrun.
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*/
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union cvmx_usbcx_hfnum hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))};
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union cvmx_usbcx_hfir hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))};
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if (hfnum.s.frrem < hfir.s.frint/4)
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* next one
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*/
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if ((transaction->iso_number_packets > 1) && (complete_code == CVMX_USB_COMPLETE_SUCCESS)) {
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transaction->actual_bytes = 0; /* No bytes transferred for this packet as of yet */
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transaction->iso_number_packets--; /* One less ISO waiting to transfer */
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transaction->iso_packets++; /* Increment to the next location in our packet array */
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/* No bytes transferred for this packet as of yet */
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transaction->actual_bytes = 0;
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/* One less ISO waiting to transfer */
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transaction->iso_number_packets--;
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/* Increment to the next location in our packet array */
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transaction->iso_packets++;
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transaction->stage = CVMX_USB_STAGE_NON_CONTROL;
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goto done;
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}
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transaction->buffer = buffer;
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transaction->buffer_length = buffer_length;
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transaction->control_header = control_header;
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transaction->iso_start_frame = iso_start_frame; // FIXME: This is not used, implement it
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/* FIXME: This is not used, implement it. */
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transaction->iso_start_frame = iso_start_frame;
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transaction->iso_number_packets = iso_number_packets;
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transaction->iso_packets = iso_packets;
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transaction->callback = callback;
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* @pipe_handle:
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* Pipe handle to cancel requests in.
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* @submit_handle:
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* Handle to transaction to cancel, returned by the submit function.
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* Handle to transaction to cancel, returned by the submit
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* function.
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*
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* Returns: 0 or a negative error code.
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*/
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@ -2445,7 +2504,10 @@ int cvmx_usb_cancel(struct cvmx_usb_state *state, int pipe_handle, int submit_ha
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CVMX_SYNCW;
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usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index));
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/* If the channel isn't enabled then the transaction already completed */
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/*
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* If the channel isn't enabled then the transaction already
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* completed.
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*/
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if (usbc_hcchar.s.chena) {
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usbc_hcchar.s.chdis = 1;
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index), usbc_hcchar.u32);
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__cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32);
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return 0;
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} else if (usbc_hcint.s.xfercompl) {
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/* Successful IN/OUT with transfer complete. Channel halt isn't needed */
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/*
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* Successful IN/OUT with transfer complete.
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* Channel halt isn't needed.
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*/
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} else {
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cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb->index, channel);
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return 0;
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break;
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}
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} else if (usbc_hcint.s.nak) {
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/* If this was a split then clear our split in progress marker */
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/*
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* If this was a split then clear our split in progress marker.
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*/
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if (usb->active_split == transaction)
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usb->active_split = NULL;
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/*
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