drm/amd/display: allow diags to skip initial link training

[why]
diag specify what the full config and is only concerned about pass/fail at the end

having inter-op code like verifiying we can actually train at reported link rate
slows down diag test and add complexity we don't need

[how]
add dc_debug option to skip capability link trianing

also  remove hbr in function name as verify is not specific to hbr

Signed-off-by: Tony Cheng <tony.cheng@amd.com>
Reviewed-by: Ken Chalmers <ken.chalmers@amd.com>
Acked-by: Leo Li <sunpeng.li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Tony Cheng 2018-07-11 15:31:24 -04:00 committed by Alex Deucher
parent 85344e75d0
commit aafded8885
4 changed files with 9 additions and 3 deletions

View File

@ -760,7 +760,7 @@ bool dc_link_detect(struct dc_link *link, enum dc_detect_reason reason)
*/
/* deal with non-mst cases */
dp_hbr_verify_link_cap(link, &link->reported_link_cap);
dp_verify_link_cap(link, &link->reported_link_cap);
}
/* HDMI-DVI Dongle */

View File

@ -1086,7 +1086,7 @@ static struct dc_link_settings get_max_link_cap(struct dc_link *link)
return max_link_cap;
}
bool dp_hbr_verify_link_cap(
bool dp_verify_link_cap(
struct dc_link *link,
struct dc_link_settings *known_limit_link_setting)
{
@ -1101,6 +1101,11 @@ bool dp_hbr_verify_link_cap(
enum clock_source_id dp_cs_id = CLOCK_SOURCE_ID_EXTERNAL;
enum link_training_result status;
if (link->dc->debug.skip_detection_link_training) {
link->verified_link_cap = *known_limit_link_setting;
return true;
}
success = false;
skip_link_training = false;

View File

@ -258,6 +258,7 @@ struct dc_debug {
bool avoid_vbios_exec_table;
bool scl_reset_length10;
bool hdmi20_disable;
bool skip_detection_link_training;
struct {
uint32_t ltFailCount;

View File

@ -33,7 +33,7 @@ struct dc_link;
struct dc_stream_state;
struct dc_link_settings;
bool dp_hbr_verify_link_cap(
bool dp_verify_link_cap(
struct dc_link *link,
struct dc_link_settings *known_limit_link_setting);