i.MX51: handle IRQ for gpio 16..31
The i.MX51 generates 2 IRQ for each GPIO bank : one for gpio 0 to 15 and one for gpio 16 to 31. Actually only the lower IRQ is registered so register the second one. Signed-off-by: Eric Bénard <eric@eukrea.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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@ -250,24 +250,28 @@ static struct mxc_gpio_port mxc_gpio_ports[] = {
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.chip.label = "gpio-0",
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.chip.label = "gpio-0",
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.base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
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.base = MX51_IO_ADDRESS(MX51_GPIO1_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO1_LOW,
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.irq = MX51_MXC_INT_GPIO1_LOW,
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.irq_high = MX51_MXC_INT_GPIO1_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START
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.virtual_irq_start = MXC_GPIO_IRQ_START
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},
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},
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{
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{
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.chip.label = "gpio-1",
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.chip.label = "gpio-1",
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.base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
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.base = MX51_IO_ADDRESS(MX51_GPIO2_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO2_LOW,
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.irq = MX51_MXC_INT_GPIO2_LOW,
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.irq_high = MX51_MXC_INT_GPIO2_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 1
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},
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},
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{
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{
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.chip.label = "gpio-2",
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.chip.label = "gpio-2",
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.base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
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.base = MX51_IO_ADDRESS(MX51_GPIO3_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO3_LOW,
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.irq = MX51_MXC_INT_GPIO3_LOW,
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.irq_high = MX51_MXC_INT_GPIO3_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 2
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},
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},
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{
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{
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.chip.label = "gpio-3",
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.chip.label = "gpio-3",
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.base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
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.base = MX51_IO_ADDRESS(MX51_GPIO4_BASE_ADDR),
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.irq = MX51_MXC_INT_GPIO4_LOW,
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.irq = MX51_MXC_INT_GPIO4_LOW,
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.irq_high = MX51_MXC_INT_GPIO4_HIGH,
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
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.virtual_irq_start = MXC_GPIO_IRQ_START + 32 * 3
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},
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},
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};
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};
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@ -292,6 +292,12 @@ int __init mxc_gpio_init(struct mxc_gpio_port *port, int cnt)
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/* setup one handler for each entry */
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/* setup one handler for each entry */
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set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
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set_irq_chained_handler(port[i].irq, mx3_gpio_irq_handler);
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set_irq_data(port[i].irq, &port[i]);
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set_irq_data(port[i].irq, &port[i]);
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if (port[i].irq_high) {
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/* setup handler for GPIO 16 to 31 */
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set_irq_chained_handler(port[i].irq_high,
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mx3_gpio_irq_handler);
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set_irq_data(port[i].irq_high, &port[i]);
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}
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}
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}
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}
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}
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@ -33,6 +33,7 @@
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struct mxc_gpio_port {
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struct mxc_gpio_port {
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void __iomem *base;
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void __iomem *base;
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int irq;
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int irq;
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int irq_high;
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int virtual_irq_start;
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int virtual_irq_start;
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struct gpio_chip chip;
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struct gpio_chip chip;
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u32 both_edges;
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u32 both_edges;
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