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drm/amd/display: Vari-bright looks disabled near end of MM14 

Avoid hanging DMCU by setting abm level only when OTG unblanked

Signed-off-by: SivapiriyanKumarasamy <sivapiriyan.kumarasamy@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
SivapiriyanKumarasamy 2018-02-13 17:37:23 -05:00 committed by Alex Deucher
parent d5400aab15
commit aa5a577730
4 changed files with 40 additions and 12 deletions
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8
drivers/gpu/drm/amd/display/dc/core/dc.c
View File

@ -42,6 +42,7 @@
#include "dmcu.h"
#include "dpp.h"
#include "timing_generator.h"
#include "abm.h"
#include "virtual/virtual_link_encoder.h"
#include "link_hwss.h"
@ -1361,6 +1362,13 @@ static void commit_planes_for_stream(struct dc *dc,
dc->hwss.apply_ctx_for_surface(
dc, pipe_ctx->stream, stream_status->plane_count, context);
if (stream_update->abm_setting.stream_update) {
if (dc->res_pool->abm)
dc->res_pool->abm->funcs->set_abm_level(
dc->res_pool->abm, stream->abm_settings.abm_level);
stream->abm_settings.stream_update = 0;
}
}
}

5
drivers/gpu/drm/amd/display/dc/dc.h
View File

@ -60,6 +60,11 @@ struct dc_versions {
struct dmcu_version dmcu_version;
};
struct abm_setting {
bool stream_update;
unsigned int abm_level;
};
struct dc_caps {
uint32_t max_streams;
uint32_t max_links;

4
drivers/gpu/drm/amd/display/dc/dc_stream.h
View File

@ -74,6 +74,9 @@ struct dc_stream_state {
unsigned char psr_version;
/* TODO: CEA VIC */
/* DMCU info */
struct abm_setting abm_settings;
/* from core_stream struct */
struct dc_context *ctx;
@ -106,6 +109,7 @@ struct dc_stream_update {
struct dc_transfer_func *out_transfer_func;
struct dc_hdr_static_metadata *hdr_static_metadata;
enum color_transfer_func color_output_tf;
struct abm_setting abm_setting;
};
bool dc_is_stream_unchanged(

35
drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hw_sequencer.c
View File

@ -1780,14 +1780,33 @@ static void update_dchubp_dpp(
hubp->funcs->set_blank(hubp, false);
}
static void dcn10_otg_blank(
struct stream_resource stream_res,
struct abm *abm,
struct dc_stream_state *stream,
bool blank)
{
if (!blank) {
if (stream_res.tg->funcs->set_blank)
stream_res.tg->funcs->set_blank(stream_res.tg, blank);
if (abm)
abm->funcs->set_abm_level(abm, stream->abm_settings.abm_level);
} else if (blank) {
if (abm)
abm->funcs->set_abm_immediate_disable(abm);
if (stream_res.tg->funcs->set_blank)
stream_res.tg->funcs->set_blank(stream_res.tg, blank);
}
}
static void program_all_pipe_in_tree(
struct dc *dc,
struct pipe_ctx *pipe_ctx,
struct dc_state *context)
{
if (pipe_ctx->top_pipe == NULL) {
bool blank = !is_pipe_tree_visible(pipe_ctx);
pipe_ctx->stream_res.tg->dlg_otg_param.vready_offset = pipe_ctx->pipe_dlg_param.vready_offset;
pipe_ctx->stream_res.tg->dlg_otg_param.vstartup_start = pipe_ctx->pipe_dlg_param.vstartup_start;
@ -1798,10 +1817,8 @@ static void program_all_pipe_in_tree(
pipe_ctx->stream_res.tg->funcs->program_global_sync(
pipe_ctx->stream_res.tg);
if (pipe_ctx->stream_res.tg->funcs->set_blank)
pipe_ctx->stream_res.tg->funcs->set_blank(
pipe_ctx->stream_res.tg,
!is_pipe_tree_visible(pipe_ctx));
dcn10_otg_blank(pipe_ctx->stream_res, dc->res_pool->abm,
pipe_ctx->stream, blank);
}
if (pipe_ctx->plane_state != NULL) {
@ -1908,29 +1925,23 @@ static void dcn10_apply_ctx_for_surface(
{
int i;
struct timing_generator *tg;
struct output_pixel_processor *opp;
bool removed_pipe[4] = { false };
unsigned int ref_clk_mhz = dc->res_pool->ref_clock_inKhz/1000;
bool program_water_mark = false;
struct dc_context *ctx = dc->ctx;
struct pipe_ctx *top_pipe_to_program =
find_top_pipe_for_stream(dc, context, stream);
if (!top_pipe_to_program)
return;
opp = top_pipe_to_program->stream_res.opp;
tg = top_pipe_to_program->stream_res.tg;
dcn10_pipe_control_lock(dc, top_pipe_to_program, true);
if (num_planes == 0) {
/* OTG blank before remove all front end */
if (tg->funcs->set_blank)
tg->funcs->set_blank(tg, true);
dcn10_otg_blank(top_pipe_to_program->stream_res, dc->res_pool->abm, top_pipe_to_program->stream, true);
}
/* Disconnect unused mpcc */