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pinctrl: uniphier: support per-pin input enable for new SoCs 

Upcoming new pinctrl drivers for PH1-LD11 and PH-LD20 support input
signal gating for each pin.  (While, existing ones only support it
per pin-group.)  This commit updates the core part for that.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Masahiro Yamada 2016-05-31 17:05:17 +09:00 committed by Linus Walleij
parent c2ebf4754b
commit aa543888ca
2 changed files with 14 additions and 11 deletions
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24
drivers/pinctrl/uniphier/pinctrl-uniphier-core.c
View File

@ -433,22 +433,24 @@ static int uniphier_conf_pin_input_enable(struct pinctrl_dev *pctldev,
{
struct uniphier_pinctrl_priv *priv = pinctrl_dev_get_drvdata(pctldev);
unsigned int iectrl = uniphier_pin_get_iectrl(desc->drv_data);
unsigned int reg, mask;
if (enable == 0) {
/*
* Multiple pins share one input enable, so per-pin disabling
* is impossible.
*/
dev_err(pctldev->dev, "unable to disable input\n");
/*
* Multiple pins share one input enable, per-pin disabling is
* impossible.
*/
if (!(priv->socdata->caps & UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL) &&
!enable)
return -EINVAL;
}
/* UNIPHIER_PIN_IECTRL_NONE means the pin is always input-enabled */
if (iectrl == UNIPHIER_PIN_IECTRL_NONE)
/* This pin is always input-enabled. nothing to do. */
return 0;
return enable ? 0 : -EINVAL;
return regmap_update_bits(priv->regmap, UNIPHIER_PINCTRL_IECTRL,
BIT(iectrl), BIT(iectrl));
reg = UNIPHIER_PINCTRL_IECTRL + iectrl / 32 * 4;
mask = BIT(iectrl % 32);
return regmap_update_bits(priv->regmap, reg, mask, enable ? mask : 0);
}
static int uniphier_conf_pin_config_set(struct pinctrl_dev *pctldev,

1
drivers/pinctrl/uniphier/pinctrl-uniphier.h
View File

@ -166,6 +166,7 @@ struct uniphier_pinctrl_socdata {
const struct uniphier_pinmux_function *functions;
int functions_count;
unsigned int caps;
#define UNIPHIER_PINCTRL_CAPS_PERPIN_IECTRL BIT(1)
#define UNIPHIER_PINCTRL_CAPS_DBGMUX_SEPARATE BIT(0)
};