r8152: disable DelayPhyPwrChg
When enabling this, the device would wait an internal signal which wouldn't be triggered. Then, the device couldn't enter P3 mode, so the power consumption is increased. Signed-off-by: Hayes Wang <hayeswang@realtek.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -31,7 +31,7 @@
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#define NETNEXT_VERSION "11"
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/* Information for net */
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#define NET_VERSION "10"
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#define NET_VERSION "11"
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#define DRIVER_VERSION "v1." NETNEXT_VERSION "." NET_VERSION
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#define DRIVER_AUTHOR "Realtek linux nic maintainers <nic_swsd@realtek.com>"
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@ -109,6 +109,7 @@
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#define PLA_BP_EN 0xfc38
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#define USB_USB2PHY 0xb41e
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#define USB_SSPHYLINK1 0xb426
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#define USB_SSPHYLINK2 0xb428
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#define USB_U2P3_CTRL 0xb460
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#define USB_CSR_DUMMY1 0xb464
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@ -384,6 +385,9 @@
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#define USB2PHY_SUSPEND 0x0001
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#define USB2PHY_L1 0x0002
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/* USB_SSPHYLINK1 */
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#define DELAY_PHY_PWR_CHG BIT(1)
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/* USB_SSPHYLINK2 */
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#define pwd_dn_scale_mask 0x3ffe
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#define pwd_dn_scale(x) ((x) << 1)
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@ -4994,6 +4998,10 @@ static void rtl8153_up(struct r8152 *tp)
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ocp_data &= ~LANWAKE_PIN;
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ocp_write_byte(tp, MCU_TYPE_PLA, PLA_LWAKE_CTRL_REG, ocp_data);
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ocp_data = ocp_read_word(tp, MCU_TYPE_USB, USB_SSPHYLINK1);
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ocp_data &= ~DELAY_PHY_PWR_CHG;
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ocp_write_word(tp, MCU_TYPE_USB, USB_SSPHYLINK1, ocp_data);
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r8153_aldps_en(tp, true);
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switch (tp->version) {
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