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arm64: dts: mediatek: Correct Nor Flash clock of MT8192 

When the initial devicetree for mt8192 was added in 48489980e2 ("arm64:
dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile"), the
clock driver for mt8192 was not yet upstream, so the clock property nodes
were set to the clk26m clock as a placeholder.

Given that the clock driver has since been added through 710573dee3 ("clk:
mediatek: Add MT8192 basic clocks support"), as well as its dt-bindings
through f35f1a23e0 ("clk: mediatek: Add dt-bindings of MT8192 clocks") and
devicetree nodes through 5d2b897bc6 ("arm64: dts: mediatek: Add mt8192
clock controllers"), fix the Nor Flash clock property to point to the actual
clock.

Signed-off-by: Allen-KH Cheng <Allen-KH.Cheng@mediatek.com>
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220113065822.11809-4-allen-kh.cheng@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
This commit is contained in:
Allen-KH Cheng 2022-01-13 14:58:20 +08:00 committed by Matthias Brugger
parent 7f0c5b39db
commit aa247c07f7
1 changed files with 5 additions and 3 deletions
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8
arch/arm64/boot/dts/mediatek/mt8192.dtsi
View File

@ -464,10 +464,12 @@
compatible = "mediatek,mt8192-nor";
reg = <0 0x11234000 0 0xe0>;
interrupts = <GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH 0>;
clocks = <&clk26m>,
<&clk26m>,
<&clk26m>;
clocks = <&topckgen CLK_TOP_SFLASH_SEL>,
<&infracfg CLK_INFRA_FLASHIF_SFLASH>,
<&infracfg CLK_INFRA_FLASHIF_TOP_H_133M>;
clock-names = "spi", "sf", "axi";
assigned-clocks = <&topckgen CLK_TOP_SFLASH_SEL>;
assigned-clock-parents = <&clk26m>;
#address-cells = <1>;
#size-cells = <0>;
status = "disable";