drm/i915: Handle set_cache_level errors in the pipe control scratch setup

Split out from Chris vma-bind rework.

Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Ben Widawsky <benjamin.widawsky@intel.com>
Cc: Jani Nikula <jani.nikula@linux.intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Daniel Vetter 2014-02-14 14:01:13 +01:00
parent bf3d149b25
commit a9cc726c85
1 changed files with 3 additions and 1 deletions

View File

@ -531,7 +531,9 @@ init_pipe_control(struct intel_ring_buffer *ring)
goto err; goto err;
} }
i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC); ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
if (ret)
goto err_unref;
ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0); ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);
if (ret) if (ret)