drm/i915: Handle set_cache_level errors in the pipe control scratch setup
Split out from Chris vma-bind rework. Cc: Chris Wilson <chris@chris-wilson.co.uk> Cc: Ben Widawsky <benjamin.widawsky@intel.com> Cc: Jani Nikula <jani.nikula@linux.intel.com> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
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@ -531,7 +531,9 @@ init_pipe_control(struct intel_ring_buffer *ring)
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goto err;
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}
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i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
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ret = i915_gem_object_set_cache_level(ring->scratch.obj, I915_CACHE_LLC);
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if (ret)
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goto err_unref;
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ret = i915_gem_obj_ggtt_pin(ring->scratch.obj, 4096, 0);
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if (ret)
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