IB/hfi1: Add selected Rcv counters
These counters are required for error analysis and debug. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Mike Marciniszyn <mike.marciniszyn@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Jason Gunthorpe <jgg@mellanox.com>
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@ -4104,6 +4104,9 @@ def_access_ibp_counter(seq_naks);
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static struct cntr_entry dev_cntrs[DEV_CNTR_LAST] = {
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[C_RCV_OVF] = RXE32_DEV_CNTR_ELEM(RcvOverflow, RCV_BUF_OVFL_CNT, CNTR_SYNTH),
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[C_RX_LEN_ERR] = RXE32_DEV_CNTR_ELEM(RxLenErr, RCV_LENGTH_ERR_CNT, CNTR_SYNTH),
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[C_RX_ICRC_ERR] = RXE32_DEV_CNTR_ELEM(RxICrcErr, RCV_ICRC_ERR_CNT, CNTR_SYNTH),
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[C_RX_EBP] = RXE32_DEV_CNTR_ELEM(RxEbpCnt, RCV_EBP_CNT, CNTR_SYNTH),
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[C_RX_TID_FULL] = RXE32_DEV_CNTR_ELEM(RxTIDFullEr, RCV_TID_FULL_ERR_CNT,
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CNTR_NORMAL),
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[C_RX_TID_INVALID] = RXE32_DEV_CNTR_ELEM(RxTIDInvalid, RCV_TID_VALID_ERR_CNT,
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@ -858,6 +858,9 @@ static inline int idx_from_vl(int vl)
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/* Per device counter indexes */
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enum {
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C_RCV_OVF = 0,
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C_RX_LEN_ERR,
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C_RX_ICRC_ERR,
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C_RX_EBP,
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C_RX_TID_FULL,
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C_RX_TID_INVALID,
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C_RX_TID_FLGMS,
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@ -380,6 +380,9 @@
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#define DC_LCB_PRF_TX_FLIT_CNT (DC_LCB_CSRS + 0x000000000418)
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#define DC_LCB_STS_LINK_TRANSFER_ACTIVE (DC_LCB_CSRS + 0x000000000468)
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#define DC_LCB_STS_ROUND_TRIP_LTP_CNT (DC_LCB_CSRS + 0x0000000004B0)
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#define RCV_LENGTH_ERR_CNT 0
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#define RCV_ICRC_ERR_CNT 6
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#define RCV_EBP_CNT 9
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#define RCV_BUF_OVFL_CNT 10
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#define RCV_CONTEXT_EGR_STALL 22
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#define RCV_DATA_PKT_CNT 0
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