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Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net 

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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
This commit is contained in:
Jakub Kicinski 2022-06-09 16:38:15 -07:00
parent 263efe85a4 825464e79d
commit a98a62e456
2173 changed files with 70940 additions and 34823 deletions
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2
.mailmap
View File

@ -201,6 +201,8 @@ Jordan Crouse <jordan@cosmicpenguin.net> <jcrouse@codeaurora.org>
<josh@joshtriplett.org> <josht@linux.vnet.ibm.com>
<josh@joshtriplett.org> <josht@us.ibm.com>
<josh@joshtriplett.org> <josht@vnet.ibm.com>
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@redhat.com>
Josh Poimboeuf <jpoimboe@kernel.org> <jpoimboe@us.ibm.com>
Juha Yrjola <at solidboot.com>
Juha Yrjola <juha.yrjola@nokia.com>
Juha Yrjola <juha.yrjola@solidboot.com>

10
Documentation/ABI/stable/sysfs-bus-mhi
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@ -19,3 +19,13 @@ Description: The file holds the OEM PK Hash value of the endpoint device
read without having the device power on at least once, the file
will read all 0's.
Users: Any userspace application or clients interested in device info.
What: /sys/bus/mhi/devices/.../soc_reset
Date: April 2022
KernelVersion: 5.19
Contact: mhi@lists.linux.dev
Description: Initiates a SoC reset on the MHI controller. A SoC reset is
a reset of last resort, and will require a complete re-init.
This can be useful as a method of recovery if the device is
non-responsive, or as a means of loading new firmware as a
system administration task.

1
Documentation/ABI/testing/configfs-usb-gadget-uvc
View File

@ -7,6 +7,7 @@ Description: UVC function directory
streaming_maxburst 0..15 (ss only)
streaming_maxpacket 1..1023 (fs), 1..3072 (hs/ss)
streaming_interval 1..16
function_name string [32]
=================== =============================
What: /config/usb-gadget/gadget/functions/uvc.name/control

38
Documentation/ABI/testing/debugfs-driver-habanalabs
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@ -170,6 +170,20 @@ KernelVersion: 5.1
Contact: ogabbay@kernel.org
Description: Sets the state of the third S/W led on the device
What: /sys/kernel/debug/habanalabs/hl<n>/memory_scrub
Date: May 2022
KernelVersion: 5.19
Contact: dhirschfeld@habana.ai
Description: Allows the root user to scrub the dram memory. The scrubbing
value can be set using the debugfs file memory_scrub_val.
What: /sys/kernel/debug/habanalabs/hl<n>/memory_scrub_val
Date: May 2022
KernelVersion: 5.19
Contact: dhirschfeld@habana.ai
Description: The value to which the dram will be set to when the user
scrubs the dram using 'memory_scrub' debugfs file
What: /sys/kernel/debug/habanalabs/hl<n>/mmu
Date: Jan 2019
KernelVersion: 5.1
@ -190,6 +204,30 @@ Description: Check and display page fault or access violation mmu errors for
echo "0x200" > /sys/kernel/debug/habanalabs/hl0/mmu_error
cat /sys/kernel/debug/habanalabs/hl0/mmu_error
What: /sys/kernel/debug/habanalabs/hl<n>/monitor_dump
Date: Mar 2022
KernelVersion: 5.19
Contact: osharabi@habana.ai
Description: Allows the root user to dump monitors status from the device's
protected config space.
This property is a binary blob that contains the result of the
monitors registers dump.
This custom interface is needed (instead of using the generic
Linux user-space PCI mapping) because this space is protected
and cannot be accessed using PCI read.
This interface doesn't support concurrency in the same device.
Only supported on GAUDI.
What: /sys/kernel/debug/habanalabs/hl<n>/monitor_dump_trig
Date: Mar 2022
KernelVersion: 5.19
Contact: osharabi@habana.ai
Description: Triggers dump of monitor data. The value to trigger the operation
must be 1. Triggering the monitor dump operation initiates dump of
current registers values of all monitors.
When the write is finished, the user can read the "monitor_dump"
blob
What: /sys/kernel/debug/habanalabs/hl<n>/set_power_state
Date: Jan 2019
KernelVersion: 5.1

10
Documentation/ABI/testing/sysfs-bus-thunderbolt
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@ -293,6 +293,16 @@ Contact: thunderbolt-software@lists.01.org
Description: This contains XDomain service specific settings as
bitmask. Format: %x
What: /sys/bus/thunderbolt/devices/usb4_portX/connector
Date: April 2022
Contact: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Description:
Symlink to the USB Type-C connector. This link is only
created when USB Type-C Connector Class is enabled,
and only if the system firmware is capable of
describing the connection between a port and its
connector.
What: /sys/bus/thunderbolt/devices/usb4_portX/link
Date: Sep 2021
KernelVersion: v5.14

77
Documentation/ABI/testing/sysfs-class-firmware Normal file
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@ -0,0 +1,77 @@
What: /sys/class/firmware/.../data
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: The data sysfs file is used for firmware-fallback and for
firmware uploads. Cat a firmware image to this sysfs file
after you echo 1 to the loading sysfs file. When the firmware
image write is complete, echo 0 to the loading sysfs file. This
sequence will signal the completion of the firmware write and
signal the lower-level driver that the firmware data is
available.
What: /sys/class/firmware/.../cancel
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: Write-only. For firmware uploads, write a "1" to this file to
request that the transfer of firmware data to the lower-level
device be canceled. This request will be rejected (EBUSY) if
the update cannot be canceled (e.g. a FLASH write is in
progress) or (ENODEV) if there is no firmware update in progress.
What: /sys/class/firmware/.../error
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: Read-only. Returns a string describing a failed firmware
upload. This string will be in the form of <STATUS>:<ERROR>,
where <STATUS> will be one of the status strings described
for the status sysfs file and <ERROR> will be one of the
following: "hw-error", "timeout", "user-abort", "device-busy",
"invalid-file-size", "read-write-error", "flash-wearout". The
error sysfs file is only meaningful when the current firmware
upload status is "idle". If this file is read while a firmware
transfer is in progress, then the read will fail with EBUSY.
What: /sys/class/firmware/.../loading
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: The loading sysfs file is used for both firmware-fallback and
for firmware uploads. Echo 1 onto the loading file to indicate
you are writing a firmware file to the data sysfs node. Echo
-1 onto this file to abort the data write or echo 0 onto this
file to indicate that the write is complete. For firmware
uploads, the zero value also triggers the transfer of the
firmware data to the lower-level device driver.
What: /sys/class/firmware/.../remaining_size
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: Read-only. For firmware upload, this file contains the size
of the firmware data that remains to be transferred to the
lower-level device driver. The size value is initialized to
the full size of the firmware image that was previously
written to the data sysfs file. This value is periodically
updated during the "transferring" phase of the firmware
upload.
Format: "%u".
What: /sys/class/firmware/.../status
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: Read-only. Returns a string describing the current status of
a firmware upload. The string will be one of the following:
idle, "receiving", "preparing", "transferring", "programming".
What: /sys/class/firmware/.../timeout
Date: July 2022
KernelVersion: 5.19
Contact: Russ Weight <russell.h.weight@intel.com>
Description: This file supports the timeout mechanism for firmware
fallback. This file has no affect on firmware uploads. For
more information on timeouts please see the documentation
for firmware fallback.

42
Documentation/ABI/testing/sysfs-devices-physical_location Normal file
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@ -0,0 +1,42 @@
What: /sys/devices/.../physical_location
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
This directory contains information on physical location of
the device connection point with respect to the system's
housing.
What: /sys/devices/.../physical_location/panel
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
Describes which panel surface of the system’s housing the
device connection point resides on.
What: /sys/devices/.../physical_location/vertical_position
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
Describes vertical position of the device connection point on
the panel surface.
What: /sys/devices/.../physical_location/horizontal_position
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
Describes horizontal position of the device connection point on
the panel surface.
What: /sys/devices/.../physical_location/dock
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
"Yes" if the device connection point resides in a docking
station or a port replicator. "No" otherwise.
What: /sys/devices/.../physical_location/lid
Date: March 2022
Contact: Won Chung <wonchung@google.com>
Description:
"Yes" if the device connection point resides on the lid of
laptop system. "No" otherwise.

5
Documentation/accounting/delay-accounting.rst
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@ -15,6 +15,7 @@ c) swapping in pages
d) memory reclaim
e) thrashing page cache
f) direct compact
g) write-protect copy
and makes these statistics available to userspace through
the taskstats interface.
@ -48,7 +49,7 @@ this structure. See
for a description of the fields pertaining to delay accounting.
It will generally be in the form of counters returning the cumulative
delay seen for cpu, sync block I/O, swapin, memory reclaim, thrash page
cache, direct compact etc.
cache, direct compact, write-protect copy etc.
Taking the difference of two successive readings of a given
counter (say cpu_delay_total) for a task will give the delay
@ -117,6 +118,8 @@ Get sum of delays, since system boot, for all pids with tgid 5::
0 0 0ms
COMPACT count delay total delay average
0 0 0ms
WPCOPY count delay total delay average
0 0 0ms
Get IO accounting for pid 1, it works only with -p::

6
Documentation/admin-guide/blockdev/index.rst
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@ -1,8 +1,8 @@
.. SPDX-License-Identifier: GPL-2.0
===========================
The Linux RapidIO Subsystem
===========================
=============
Block Devices
=============
.. toctree::
:maxdepth: 1

11
Documentation/admin-guide/kernel-parameters.txt
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@ -979,8 +979,10 @@
[KNL] Debugging option to set a timeout in seconds for
deferred probe to give up waiting on dependencies to
probe. Only specific dependencies (subsystems or
drivers) that have opted in will be ignored. A timeout of 0
will timeout at the end of initcalls. This option will also
drivers) that have opted in will be ignored. A timeout
of 0 will timeout at the end of initcalls. If the time
out hasn't expired, it'll be restarted by each
successful driver registration. This option will also
dump out devices still on the deferred probe list after
retrying.
@ -1101,7 +1103,10 @@
driver later using sysfs.
driver_async_probe= [KNL]
List of driver names to be probed asynchronously.
List of driver names to be probed asynchronously. *
matches with all driver names. If * is specified, the
rest of the listed driver names are those that will NOT
match the *.
Format: <driver_name1>,<driver_name2>...
drm.edid_firmware=[<connector>:]<file>[,[<connector>:]<file>]

1
Documentation/arch.rst
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@ -13,6 +13,7 @@ implementation.
arm/index
arm64/index
ia64/index
loongarch/index
m68k/index
mips/index
nios2/index

7
Documentation/arm/marvell.rst
View File

@ -374,8 +374,6 @@ PXA 2xx/3xx/93x/95x family
Linux kernel mach directory:
arch/arm/mach-pxa
Linux kernel plat directory:
arch/arm/plat-pxa
MMP/MMP2/MMP3 family (communication processor)
----------------------------------------------
@ -429,8 +427,6 @@ MMP/MMP2/MMP3 family (communication processor)
Linux kernel mach directory:
arch/arm/mach-mmp
Linux kernel plat directory:
arch/arm/plat-pxa
Berlin family (Multimedia Solutions)
-------------------------------------
@ -518,9 +514,6 @@ Long-term plans
Business Unit) in a single mach-<foo> directory. The plat-orion/
would therefore disappear.
* Unify the mach-mmp/ and mach-pxa/ into the same mach-pxa
directory. The plat-pxa/ would therefore disappear.
Credits
-------

2
Documentation/conf.py
View File

@ -161,7 +161,7 @@ finally:
#
# This is also used if you do content translation via gettext catalogs.
# Usually you set "language" from the command line for these cases.
language = None
language = 'en'
# There are two options for replacing |today|: either, you set today to some
# non-false value, then it is used:

27
Documentation/devicetree/bindings/arm/hpe,gxp.yaml Normal file
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@ -0,0 +1,27 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/arm/hpe,gxp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: HPE BMC GXP platforms
maintainers:
- Nick Hawkins <nick.hawkins@hpe.com>
- Jean-Marie Verdun <verdun@hpe.com>
properties:
compatible:
oneOf:
- description: GXP Based Boards
items:
- enum:
- hpe,gxp-dl360gen10
- const: hpe,gxp
required:
- compatible
additionalProperties: true
...

1
Documentation/devicetree/bindings/arm/intel,socfpga.yaml
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@ -18,6 +18,7 @@ properties:
items:
- enum:
- intel,n5x-socdk
- intel,socfpga-agilex-n6000
- intel,socfpga-agilex-socdk
- const: intel,socfpga-agilex

2
Documentation/devicetree/bindings/clock/qcom,mmcc.yaml
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@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Multimedia Clock & Reset Controller Binding
maintainers:
- Jeffrey Hugo <jhugo@codeaurora.org>
- Jeffrey Hugo <quic_jhugo@quicinc.com>
- Taniya Das <tdas@codeaurora.org>
description: |

5
Documentation/devicetree/bindings/extcon/siliconmitus,sm5502-muic.yaml
View File

@ -20,11 +20,12 @@ properties:
enum:
- siliconmitus,sm5502-muic
- siliconmitus,sm5504-muic
- siliconmitus,sm5703-muic
reg:
maxItems: 1
description: I2C slave address of the device. Usually 0x25 for SM5502,
0x14 for SM5504.
description: I2C slave address of the device. Usually 0x25 for SM5502
and SM5703, 0x14 for SM5504.
interrupts:
maxItems: 1

5
Documentation/devicetree/bindings/gpio/gpio-altera.txt
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@ -9,8 +9,9 @@ Required properties:
- The second cell is reserved and is currently unused.
- gpio-controller : Marks the device node as a GPIO controller.
- interrupt-controller: Mark the device node as an interrupt controller
- #interrupt-cells : Should be 1. The interrupt type is fixed in the hardware.
- #interrupt-cells : Should be 2. The interrupt type is fixed in the hardware.
- The first cell is the GPIO offset number within the GPIO controller.
- The second cell is the interrupt trigger type and level flags.
- interrupts: Specify the interrupt.
- altr,interrupt-type: Specifies the interrupt trigger type the GPIO
hardware is synthesized. This field is required if the Altera GPIO controller
@ -38,6 +39,6 @@ gpio_altr: gpio@ff200000 {
altr,interrupt-type = <IRQ_TYPE_EDGE_RISING>;
#gpio-cells = <2>;
gpio-controller;
#interrupt-cells = <1>;
#interrupt-cells = <2>;
interrupt-controller;
};

3
Documentation/devicetree/bindings/iio/adc/renesas,rzg2l-adc.yaml
View File

@ -19,7 +19,8 @@ properties:
compatible:
items:
- enum:
- renesas,r9a07g044-adc # RZ/G2{L,LC}
- renesas,r9a07g044-adc # RZ/G2L
- renesas,r9a07g054-adc # RZ/V2L
- const: renesas,rzg2l-adc
reg:

60
Documentation/devicetree/bindings/iio/adc/sprd,sc2720-adc.yaml
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@ -20,6 +20,7 @@ properties:
- sprd,sc2723-adc
- sprd,sc2730-adc
- sprd,sc2731-adc
- sprd,ump9620-adc
reg:
maxItems: 1
@ -33,13 +34,39 @@ properties:
hwlocks:
maxItems: 1
nvmem-cells:
maxItems: 2
nvmem-cells: true
nvmem-cell-names:
items:
- const: big_scale_calib
- const: small_scale_calib
nvmem-cell-names: true
allOf:
- if:
not:
properties:
compatible:
contains:
enum:
- sprd,ump9620-adc
then:
properties:
nvmem-cells:
maxItems: 2
nvmem-cell-names:
items:
- const: big_scale_calib
- const: small_scale_calib
else:
properties:
nvmem-cells:
maxItems: 6
nvmem-cell-names:
items:
- const: big_scale_calib1
- const: big_scale_calib2
- const: small_scale_calib1
- const: small_scale_calib2
- const: vbat_det_cal1
- const: vbat_det_cal2
required:
- compatible
@ -69,4 +96,25 @@ examples:
nvmem-cell-names = "big_scale_calib", "small_scale_calib";
};
};
- |
#include <dt-bindings/interrupt-controller/irq.h>
pmic {
#address-cells = <1>;
#size-cells = <0>;
adc@504 {
compatible = "sprd,ump9620-adc";
reg = <0x504>;
interrupt-parent = <&ump9620_pmic>;
interrupts = <0 IRQ_TYPE_LEVEL_HIGH>;
#io-channel-cells = <1>;
hwlocks = <&hwlock 4>;
nvmem-cells = <&adc_bcal1>, <&adc_bcal2>,
<&adc_scal1>, <&adc_scal2>,
<&vbat_det_cal1>, <&vbat_det_cal2>;
nvmem-cell-names = "big_scale_calib1", "big_scale_calib2",
"small_scale_calib1", "small_scale_calib2",
"vbat_det_cal1", "vbat_det_cal2";
};
};
...

7
Documentation/devicetree/bindings/iio/adc/ti,ads1015.yaml
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@ -4,7 +4,7 @@
$id: http://devicetree.org/schemas/iio/adc/ti,ads1015.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI ADS1015 4 channel I2C analog to digital converter
title: TI ADS1015/ADS1115 4 channel I2C analog to digital converter
maintainers:
- Daniel Baluta <daniel.baluta@nxp.com>
@ -15,7 +15,10 @@ description: |
properties:
compatible:
const: ti,ads1015
enum:
- ti,ads1015
- ti,ads1115
- ti,tla2024
reg:
maxItems: 1

2
Documentation/devicetree/bindings/iio/dac/adi,ad3552r.yaml
View File

@ -8,7 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Analog Devices AD2552R DAC device driver
maintainers:
- Mihail Chindris <mihail.chindris@analog.com>
- Nuno Sá <nuno.sa@analog.com>
description: |
Bindings for the Analog Devices AD3552R DAC device and similar.

2
Documentation/devicetree/bindings/iio/dac/lltc,ltc2632.yaml
View File

@ -68,7 +68,7 @@ examples:
#size-cells = <0>;
dac@0 {
compatible = "lltc,ltc2632";
compatible = "lltc,ltc2632-l12";
reg = <0>; /* CS0 */
spi-max-frequency = <1000000>;
vref-supply = <&vref>;

34
Documentation/devicetree/bindings/iio/imu/invensense,mpu6050.yaml
View File

@ -14,21 +14,25 @@ description: |
properties:
compatible:
enum:
- invensense,iam20680
- invensense,icm20608
- invensense,icm20609
- invensense,icm20689
- invensense,icm20602
- invensense,icm20690
- invensense,mpu6000
- invensense,mpu6050
- invensense,mpu6500
- invensense,mpu6515
- invensense,mpu6880
- invensense,mpu9150
- invensense,mpu9250
- invensense,mpu9255
oneOf:
- enum:
- invensense,iam20680
- invensense,icm20608
- invensense,icm20609
- invensense,icm20689
- invensense,icm20602
- invensense,icm20690
- invensense,mpu6000
- invensense,mpu6050
- invensense,mpu6500
- invensense,mpu6515
- invensense,mpu6880
- invensense,mpu9150
- invensense,mpu9250
- invensense,mpu9255
- items:
- const: invensense,icm20608d
- const: invensense,icm20608
reg:
maxItems: 1

38
Documentation/devicetree/bindings/iio/imu/st,lsm6dsx.yaml
View File

@ -14,23 +14,27 @@ description:
properties:
compatible:
enum:
- st,lsm6ds3
- st,lsm6ds3h
- st,lsm6dsl
- st,lsm6dsm
- st,ism330dlc
- st,lsm6dso
- st,asm330lhh
- st,lsm6dsox
- st,lsm6dsr
- st,lsm6ds3tr-c
- st,ism330dhcx
- st,lsm9ds1-imu
- st,lsm6ds0
- st,lsm6dsrx
- st,lsm6dst
- st,lsm6dsop
oneOf:
- enum:
- st,lsm6ds3
- st,lsm6ds3h
- st,lsm6dsl
- st,lsm6dsm
- st,ism330dlc
- st,lsm6dso
- st,asm330lhh
- st,lsm6dsox
- st,lsm6dsr
- st,lsm6ds3tr-c
- st,ism330dhcx
- st,lsm9ds1-imu
- st,lsm6ds0
- st,lsm6dsrx
- st,lsm6dst
- st,lsm6dsop
- items:
- const: st,asm330lhhx
- const: st,lsm6dsr
reg:
maxItems: 1

6
Documentation/devicetree/bindings/iio/light/stk33xx.yaml
View File

@ -13,6 +13,9 @@ maintainers:
description: |
Ambient light and proximity sensor over an i2c interface.
allOf:
- $ref: ../common.yaml#
properties:
compatible:
enum:
@ -26,6 +29,8 @@ properties:
interrupts:
maxItems: 1
proximity-near-level: true
required:
- compatible
- reg
@ -44,6 +49,7 @@ examples:
stk3310@48 {
compatible = "sensortek,stk3310";
reg = <0x48>;
proximity-near-level = <25>;
interrupt-parent = <&gpio1>;
interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
};

2
Documentation/devicetree/bindings/iio/potentiometer/microchip,mcp4131.yaml
View File

@ -95,7 +95,7 @@ examples:
#size-cells = <0>;
potentiometer@0 {
compatible = "mcp4131-502";
compatible = "microchip,mcp4131-502";
reg = <0>;
spi-max-frequency = <500000>;
};

1
Documentation/devicetree/bindings/iio/st,st-sensors.yaml
View File

@ -29,6 +29,7 @@ properties:
- st,lis2dw12
- st,lis2hh12
- st,lis2dh12-accel
- st,lis302dl
- st,lis331dl-accel
- st,lis331dlh-accel
- st,lis3de

2
Documentation/devicetree/bindings/interconnect/qcom,osm-l3.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm Operating State Manager (OSM) L3 Interconnect Provider
maintainers:
- Sibi Sankar <sibis@codeaurora.org>
- Sibi Sankar <quic_sibis@quicinc.com>
description:
L3 cache bandwidth requirements on Qualcomm SoCs is serviced by the OSM.

18
Documentation/devicetree/bindings/interconnect/qcom,rpmh.yaml
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@ -31,7 +31,6 @@ properties:
- qcom,sc7180-config-noc
- qcom,sc7180-dc-noc
- qcom,sc7180-gem-noc
- qcom,sc7180-ipa-virt
- qcom,sc7180-mc-virt
- qcom,sc7180-mmss-noc
- qcom,sc7180-npu-noc
@ -59,7 +58,20 @@ properties:
- qcom,sc8180x-ipa-virt
- qcom,sc8180x-mc-virt
- qcom,sc8180x-mmss-noc
- qcom,sc8180x-qup-virt
- qcom,sc8180x-system-noc
- qcom,sc8280xp-aggre1-noc
- qcom,sc8280xp-aggre2-noc
- qcom,sc8280xp-clk-virt
- qcom,sc8280xp-config-noc
- qcom,sc8280xp-dc-noc
- qcom,sc8280xp-gem-noc
- qcom,sc8280xp-lpass-ag-noc
- qcom,sc8280xp-mc-virt
- qcom,sc8280xp-mmss-noc
- qcom,sc8280xp-nspa-noc
- qcom,sc8280xp-nspb-noc
- qcom,sc8280xp-system-noc
- qcom,sdm845-aggre1-noc
- qcom,sdm845-aggre2-noc
- qcom,sdm845-config-noc
@ -68,10 +80,12 @@ properties:
- qcom,sdm845-mem-noc
- qcom,sdm845-mmss-noc
- qcom,sdm845-system-noc
- qcom,sdx55-ipa-virt
- qcom,sdx55-mc-virt
- qcom,sdx55-mem-noc
- qcom,sdx55-system-noc
- qcom,sdx65-mc-virt
- qcom,sdx65-mem-noc
- qcom,sdx65-system-noc
- qcom,sm8150-aggre1-noc
- qcom,sm8150-aggre2-noc
- qcom,sm8150-camnoc-noc

46
Documentation/devicetree/bindings/memory-controllers/ingenic,nemc-peripherals.yaml Normal file
View File

@ -0,0 +1,46 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Ingenic SoCs NAND / External Memory Controller (NEMC) devicetree bindings
maintainers:
- Paul Cercueil <paul@crapouillou.net>
properties:
reg:
minItems: 1
maxItems: 255
ingenic,nemc-bus-width:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [8, 16]
description: Specifies the bus width in bits.
ingenic,nemc-tAS:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address setup time in nanoseconds.
ingenic,nemc-tAH:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address hold time in nanoseconds.
ingenic,nemc-tBP:
$ref: /schemas/types.yaml#/definitions/uint32
description: Burst pitch time in nanoseconds.
ingenic,nemc-tAW:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address wait time in nanoseconds.
ingenic,nemc-tSTRV:
$ref: /schemas/types.yaml#/definitions/uint32
description: Static memory recovery time in nanoseconds.
required:
- reg
additionalProperties: true
...

32
Documentation/devicetree/bindings/memory-controllers/ingenic,nemc.yaml
View File

@ -39,38 +39,6 @@ properties:
patternProperties:
".*@[0-9]+$":
type: object
properties:
reg:
minItems: 1
maxItems: 255
ingenic,nemc-bus-width:
$ref: /schemas/types.yaml#/definitions/uint32
enum: [8, 16]
description: Specifies the bus width in bits.
ingenic,nemc-tAS:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address setup time in nanoseconds.
ingenic,nemc-tAH:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address hold time in nanoseconds.
ingenic,nemc-tBP:
$ref: /schemas/types.yaml#/definitions/uint32
description: Burst pitch time in nanoseconds.
ingenic,nemc-tAW:
$ref: /schemas/types.yaml#/definitions/uint32
description: Address wait time in nanoseconds.
ingenic,nemc-tSTRV:
$ref: /schemas/types.yaml#/definitions/uint32
description: Static memory recovery time in nanoseconds.
required:
- reg
required:
- compatible

2
Documentation/devicetree/bindings/mmc/brcm,sdhci-brcmstb.yaml
View File

@ -75,7 +75,6 @@ examples:
sd-uhs-sdr104;
sdhci,auto-cmd12;
interrupts = <0x0 0x26 0x4>;
interrupt-names = "sdio0_0";
clocks = <&scmi_clk 245>;
clock-names = "sw_sdio";
};
@ -94,7 +93,6 @@ examples:
non-removable;
bus-width = <0x8>;
interrupts = <0x0 0x27 0x4>;
interrupt-names = "sdio1_0";
clocks = <&scmi_clk 245>;
clock-names = "sw_sdio";
};

3
Documentation/devicetree/bindings/mmc/marvell,xenon-sdhci.yaml
View File

@ -56,6 +56,9 @@ properties:
- const: core
- const: axi
interrupts:
maxItems: 1
marvell,xenon-sdhc-id:
$ref: /schemas/types.yaml#/definitions/uint32
minimum: 0

1
Documentation/devicetree/bindings/mtd/ingenic,nand.yaml
View File

@ -11,6 +11,7 @@ maintainers:
allOf:
- $ref: nand-controller.yaml#
- $ref: /schemas/memory-controllers/ingenic,nemc-peripherals.yaml#
properties:
compatible:

1
Documentation/devicetree/bindings/mtd/spi-nand.yaml
View File

@ -11,6 +11,7 @@ maintainers:
allOf:
- $ref: "nand-chip.yaml#"
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
compatible:

1
Documentation/devicetree/bindings/net/cdns,macb.yaml
View File

@ -191,7 +191,6 @@ examples:
clock-names = "pclk", "hclk", "tx_clk", "rx_clk", "tsu_clk";
#address-cells = <1>;
#size-cells = <0>;
#stream-id-cells = <1>;
iommus = <&smmu 0x875>;
power-domains = <&zynqmp_firmware PD_ETH_1>;
resets = <&zynqmp_reset ZYNQMP_RESET_GEM1>;

115
Documentation/devicetree/bindings/net/dsa/brcm,b53.yaml
View File

@ -6,9 +6,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Broadcom BCM53xx Ethernet switches
allOf:
- $ref: dsa.yaml#
maintainers:
- Florian Fainelli <f.fainelli@gmail.com>
@ -68,53 +65,71 @@ required:
- compatible
- reg
# BCM585xx/586xx/88312 SoCs
if:
properties:
compatible:
contains:
enum:
- brcm,bcm58522-srab
- brcm,bcm58523-srab
- brcm,bcm58525-srab
- brcm,bcm58622-srab
- brcm,bcm58623-srab
- brcm,bcm58625-srab
- brcm,bcm88312-srab
then:
properties:
reg:
minItems: 3
maxItems: 3
reg-names:
items:
- const: srab
- const: mux_config
- const: sgmii_config
interrupts:
minItems: 13
maxItems: 13
interrupt-names:
items:
- const: link_state_p0
- const: link_state_p1
- const: link_state_p2
- const: link_state_p3
- const: link_state_p4
- const: link_state_p5
- const: link_state_p7
- const: link_state_p8
- const: phy
- const: ts
- const: imp_sleep_timer_p5
- const: imp_sleep_timer_p7
- const: imp_sleep_timer_p8
required:
- interrupts
else:
properties:
reg:
maxItems: 1
allOf:
- $ref: dsa.yaml#
- if:
properties:
compatible:
contains:
enum:
- brcm,bcm5325
- brcm,bcm53115
- brcm,bcm53125
- brcm,bcm53128
- brcm,bcm5365
- brcm,bcm5395
- brcm,bcm5397
- brcm,bcm5398
then:
$ref: /schemas/spi/spi-peripheral-props.yaml
# BCM585xx/586xx/88312 SoCs
- if:
properties:
compatible:
contains:
enum:
- brcm,bcm58522-srab
- brcm,bcm58523-srab
- brcm,bcm58525-srab
- brcm,bcm58622-srab
- brcm,bcm58623-srab
- brcm,bcm58625-srab
- brcm,bcm88312-srab
then:
properties:
reg:
minItems: 3
maxItems: 3
reg-names:
items:
- const: srab
- const: mux_config
- const: sgmii_config
interrupts:
minItems: 13
maxItems: 13
interrupt-names:
items:
- const: link_state_p0
- const: link_state_p1
- const: link_state_p2
- const: link_state_p3
- const: link_state_p4
- const: link_state_p5
- const: link_state_p7
- const: link_state_p8
- const: phy
- const: ts
- const: imp_sleep_timer_p5
- const: imp_sleep_timer_p7
- const: imp_sleep_timer_p8
required:
- interrupts
else:
properties:
reg:
maxItems: 1
unevaluatedProperties: false

1
Documentation/devicetree/bindings/net/dsa/microchip,ksz.yaml
View File

@ -12,6 +12,7 @@ maintainers:
allOf:
- $ref: dsa.yaml#
- $ref: /schemas/spi/spi-peripheral-props.yaml#
properties:
# See Documentation/devicetree/bindings/net/dsa/dsa.yaml for a list of additional

1
Documentation/devicetree/bindings/net/dsa/nxp,sja1105.yaml
View File

@ -14,6 +14,7 @@ description:
allOf:
- $ref: "dsa.yaml#"
- $ref: /schemas/spi/spi-peripheral-props.yaml#
maintainers:
- Vladimir Oltean <vladimir.oltean@nxp.com>

1
Documentation/devicetree/bindings/net/dsa/realtek.yaml
View File

@ -108,6 +108,7 @@ if:
- reg
then:
$ref: /schemas/spi/spi-peripheral-props.yaml#
not:
required:
- mdc-gpios

3
Documentation/devicetree/bindings/net/mediatek,net.yaml
View File

@ -27,6 +27,9 @@ properties:
reg:
maxItems: 1
clocks: true
clock-names: true
interrupts:
minItems: 3
maxItems: 4

3
Documentation/devicetree/bindings/net/mediatek-dwmac.yaml
View File

@ -58,6 +58,9 @@ properties:
- const: rmii_internal
- const: mac_cg
power-domains:
maxItems: 1
mediatek,pericfg:
$ref: /schemas/types.yaml#/definitions/phandle
description:

2
Documentation/devicetree/bindings/net/wireless/mediatek,mt76.yaml
View File

@ -51,7 +51,7 @@ properties:
description:
Specify the consys reset for mt7986.
reset-name:
reset-names:
const: consys
mediatek,infracfg:

50
Documentation/devicetree/bindings/nvmem/apple,efuses.yaml Normal file
View File

@ -0,0 +1,50 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/nvmem/apple,efuses.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Apple SoC eFuse-based NVMEM
description: |
Apple SoCs such as the M1 contain factory-programmed eFuses used to e.g. store
calibration data for the PCIe and the Type-C PHY or unique chip identifiers
such as the ECID.
maintainers:
- Sven Peter <sven@svenpeter.dev>
allOf:
- $ref: "nvmem.yaml#"
properties:
compatible:
items:
- enum:
- apple,t8103-efuses
- apple,t6000-efuses
- const: apple,efuses
reg:
maxItems: 1
required:
- compatible
- reg
unevaluatedProperties: false
examples:
- |
efuse@3d2bc000 {
compatible = "apple,t8103-efuses", "apple,efuses";
reg = <0x3d2bc000 0x1000>;
#address-cells = <1>;
#size-cells = <1>;
ecid: efuse@500 {
reg = <0x500 0x8>;
};
};
...

30
Documentation/devicetree/bindings/nvmem/fsl,layerscape-sfp.yaml
View File

@ -10,7 +10,7 @@ maintainers:
- Michael Walle <michael@walle.cc>
description: |
SFP is the security fuse processor which among other things provide a
SFP is the security fuse processor which among other things provides a
unique identifier per part.
allOf:
@ -18,21 +18,45 @@ allOf:
properties:
compatible:
enum:
- fsl,ls1028a-sfp
oneOf:
- description: Trust architecture 2.1 SFP
items:
- const: fsl,ls1021a-sfp
- description: Trust architecture 3.0 SFP
items:
- const: fsl,ls1028a-sfp
reg:
maxItems: 1
clocks:
maxItems: 1
description:
The SFP clock. Typically, this is the platform clock divided by 4.
clock-names:
const: sfp
ta-prog-sfp-supply:
description:
The regulator for the TA_PROG_SFP pin. It will be enabled for programming
and disabled for reading.
required:
- compatible
- reg
- clock-names
- clocks
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/clock/fsl,qoriq-clockgen.h>
efuse@1e80000 {
compatible = "fsl,ls1028a-sfp";
reg = <0x1e80000 0x8000>;
clocks = <&clockgen QORIQ_CLK_PLATFORM_PLL
QORIQ_CLK_PLL_DIV(4)>;
clock-names = "sfp";
};

5
Documentation/devicetree/bindings/pci/apple,pcie.yaml
View File

@ -68,6 +68,9 @@ properties:
iommu-map: true
iommu-map-mask: true
power-domains:
maxItems: 1
required:
- compatible
- reg
@ -134,7 +137,7 @@ examples:
ranges = <0x43000000 0x6 0xa0000000 0x6 0xa0000000 0x0 0x20000000>,
<0x02000000 0x0 0xc0000000 0x6 0xc0000000 0x0 0x40000000>;
power-domains = <&ps_apcie>, <&ps_apcie_gp>, <&ps_pcie_ref>;
power-domains = <&ps_apcie_gp>;
pinctrl-0 = <&pcie_pins>;
pinctrl-names = "default";

23
Documentation/devicetree/bindings/pci/socionext,uniphier-pcie.yaml
View File

@ -51,6 +51,19 @@ properties:
phy-names:
const: pcie-phy
interrupt-controller:
type: object
additionalProperties: false
properties:
interrupt-controller: true
'#interrupt-cells':
const: 1
interrupts:
maxItems: 1
required:
- compatible
- reg
@ -62,6 +75,13 @@ unevaluatedProperties: false
examples:
- |
bus {
gic: interrupt-controller {
interrupt-controller;
#interrupt-cells = <3>;
};
};
pcie: pcie@66000000 {
compatible = "socionext,uniphier-pcie";
reg-names = "dbi", "link", "config";
@ -80,6 +100,7 @@ examples:
phys = <&pcie_phy>;
#interrupt-cells = <1>;
interrupt-names = "dma", "msi";
interrupt-parent = <&gic>;
interrupts = <0 224 4>, <0 225 4>;
interrupt-map-mask = <0 0 0 7>;
interrupt-map = <0 0 0 1 &pcie_intc 0>,
@ -87,7 +108,7 @@ examples:
<0 0 0 3 &pcie_intc 2>,
<0 0 0 4 &pcie_intc 3>;
pcie_intc: legacy-interrupt-controller {
pcie_intc: interrupt-controller {
interrupt-controller;
#interrupt-cells = <1>;
interrupt-parent = <&gic>;

10
Documentation/devicetree/bindings/pci/xilinx-versal-cpm.yaml
View File

@ -18,13 +18,13 @@ properties:
reg:
items:
- description: Configuration space region and bridge registers.
- description: CPM system level control and status registers.
- description: Configuration space region and bridge registers.
reg-names:
items:
- const: cfg
- const: cpm_slcr
- const: cfg
interrupts:
maxItems: 1
@ -86,9 +86,9 @@ examples:
ranges = <0x02000000 0x0 0xe0000000 0x0 0xe0000000 0x0 0x10000000>,
<0x43000000 0x80 0x00000000 0x80 0x00000000 0x0 0x80000000>;
msi-map = <0x0 &its_gic 0x0 0x10000>;
reg = <0x6 0x00000000 0x0 0x10000000>,
<0x0 0xfca10000 0x0 0x1000>;
reg-names = "cfg", "cpm_slcr";
reg = <0x0 0xfca10000 0x0 0x1000>,
<0x6 0x00000000 0x0 0x10000000>;
reg-names = "cpm_slcr", "cfg";
pcie_intc_0: interrupt-controller {
#address-cells = <0>;
#interrupt-cells = <1>;

12
Documentation/devicetree/bindings/phy/allwinner,sun6i-a31-mipi-dphy.yaml
View File

@ -37,6 +37,18 @@ properties:
resets:
maxItems: 1
allwinner,direction:
$ref: '/schemas/types.yaml#/definitions/string'
description: |
Direction of the D-PHY:
- "rx" for receiving (e.g. when used with MIPI CSI-2);
- "tx" for transmitting (e.g. when used with MIPI DSI).
enum:
- tx
- rx
default: tx
required:
- "#phy-cells"
- compatible

2
Documentation/devicetree/bindings/phy/marvell,armada-3700-utmi-phy.yaml
View File

@ -45,7 +45,7 @@ additionalProperties: false
examples:
- |
usb2_utmi_host_phy: phy@5f000 {
compatible = "marvell,armada-3700-utmi-host-phy";
compatible = "marvell,a3700-utmi-host-phy";
reg = <0x5f000 0x800>;
marvell,usb-misc-reg = <&usb2_syscon>;
#phy-cells = <0>;

29
Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.txt
View File

@ -1,29 +0,0 @@
Mixel DSI PHY for i.MX8
The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
electrical signals for DSI.
Required properties:
- compatible: Must be:
- "fsl,imx8mq-mipi-dphy"
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Must contain the following entries:
- "phy_ref": phandle and specifier referring to the DPHY ref clock
- reg: the register range of the PHY controller
- #phy-cells: number of cells in PHY, as defined in
Documentation/devicetree/bindings/phy/phy-bindings.txt
this must be <0>
Optional properties:
- power-domains: phandle to power domain
Example:
dphy: dphy@30a0030 {
compatible = "fsl,imx8mq-mipi-dphy";
clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
clock-names = "phy_ref";
reg = <0x30a00300 0x100>;
power-domains = <&pd_mipi0>;
#phy-cells = <0>;
};

107
Documentation/devicetree/bindings/phy/mixel,mipi-dsi-phy.yaml Normal file
View File

@ -0,0 +1,107 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/phy/mixel,mipi-dsi-phy.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Mixel DSI PHY for i.MX8
maintainers:
- Guido Günther <agx@sigxcpu.org>
description: |
The Mixel MIPI-DSI PHY IP block is e.g. found on i.MX8 platforms (along the
MIPI-DSI IP from Northwest Logic). It represents the physical layer for the
electrical signals for DSI.
The Mixel PHY IP block found on i.MX8qxp is a combo PHY that can work
in either MIPI-DSI PHY mode or LVDS PHY mode.
properties:
compatible:
enum:
- fsl,imx8mq-mipi-dphy
- fsl,imx8qxp-mipi-dphy
reg:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: phy_ref
assigned-clocks:
maxItems: 1
assigned-clock-parents:
maxItems: 1
assigned-clock-rates:
maxItems: 1
"#phy-cells":
const: 0
fsl,syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: |
A phandle which points to Control and Status Registers(CSR) module.
power-domains:
maxItems: 1
required:
- compatible
- reg
- clocks
- clock-names
- "#phy-cells"
- power-domains
allOf:
- if:
properties:
compatible:
contains:
const: fsl,imx8mq-mipi-dphy
then:
properties:
fsl,syscon: false
required:
- assigned-clocks
- assigned-clock-parents
- assigned-clock-rates
- if:
properties:
compatible:
contains:
const: fsl,imx8qxp-mipi-dphy
then:
properties:
assigned-clocks: false
assigned-clock-parents: false
assigned-clock-rates: false
required:
- fsl,syscon
additionalProperties: false
examples:
- |
#include <dt-bindings/clock/imx8mq-clock.h>
dphy: dphy@30a0030 {
compatible = "fsl,imx8mq-mipi-dphy";
reg = <0x30a00300 0x100>;
clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
clock-names = "phy_ref";
assigned-clocks = <&clk IMX8MQ_CLK_DSI_PHY_REF>;
assigned-clock-parents = <&clk IMX8MQ_VIDEO_PLL1_OUT>;
assigned-clock-rates = <24000000>;
#phy-cells = <0>;
power-domains = <&pgc_mipi>;
};

4
Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml
View File

@ -39,6 +39,7 @@ properties:
- qcom,sdm845-qmp-usb3-phy
- qcom,sdm845-qmp-usb3-uni-phy
- qcom,sm6115-qmp-ufs-phy
- qcom,sm6350-qmp-ufs-phy
- qcom,sm8150-qmp-ufs-phy
- qcom,sm8150-qmp-usb3-phy
- qcom,sm8150-qmp-usb3-uni-phy
@ -57,6 +58,7 @@ properties:
- qcom,sm8450-qmp-usb3-phy
- qcom,sdx55-qmp-pcie-phy
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
reg:
minItems: 1
@ -163,6 +165,7 @@ allOf:
contains:
enum:
- qcom,sdx55-qmp-usb3-uni-phy
- qcom,sdx65-qmp-usb3-uni-phy
then:
properties:
clocks:
@ -279,6 +282,7 @@ allOf:
enum:
- qcom,msm8998-qmp-ufs-phy
- qcom,sdm845-qmp-ufs-phy
- qcom,sm6350-qmp-ufs-phy
- qcom,sm8150-qmp-ufs-phy
- qcom,sm8250-qmp-ufs-phy
- qcom,sc8180x-qmp-ufs-phy

1
Documentation/devicetree/bindings/phy/renesas,usb2-phy.yaml
View File

@ -32,6 +32,7 @@ properties:
- items:
- enum:
- renesas,usb2-phy-r9a07g043 # RZ/G2UL
- renesas,usb2-phy-r9a07g044 # RZ/G2{L,LC}
- renesas,usb2-phy-r9a07g054 # RZ/V2L
- const: renesas,rzg2l-usb2-phy

91
Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml
View File

@ -30,32 +30,79 @@ properties:
minItems: 1
maxItems: 2
clock-names:
oneOf:
- items: # for PXs2
- const: link
- items: # for Pro4
- const: link
- const: gio
- items: # for others
- const: link
- const: phy
clock-names: true
resets:
minItems: 2
maxItems: 5
maxItems: 6
reset-names:
oneOf:
- items: # for Pro4
- const: link
- const: gio
- const: pm
- const: tx
- const: rx
- items: # for others
- const: link
- const: phy
reset-names: true
allOf:
- if:
properties:
compatible:
contains:
const: socionext,uniphier-pro4-ahci-phy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: link
- const: gio
resets:
minItems: 6
maxItems: 6
reset-names:
items:
- const: link
- const: gio
- const: phy
- const: pm
- const: tx
- const: rx
- if:
properties:
compatible:
contains:
const: socionext,uniphier-pxs2-ahci-phy
then:
properties:
clocks:
maxItems: 1
clock-names:
const: link
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
- if:
properties:
compatible:
contains:
const: socionext,uniphier-pxs3-ahci-phy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: link
- const: phy
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
required:
- compatible

47
Documentation/devicetree/bindings/phy/socionext,uniphier-pcie-phy.yaml
View File

@ -31,28 +31,51 @@ properties:
minItems: 1
maxItems: 2
clock-names:
oneOf:
- items: # for Pro5
- const: gio
- const: link
- const: link # for others
clock-names: true
resets:
minItems: 1
maxItems: 2
reset-names:
oneOf:
- items: # for Pro5
- const: gio
- const: link
- const: link # for others
reset-names: true
socionext,syscon:
$ref: /schemas/types.yaml#/definitions/phandle
description: A phandle to system control to set configurations for phy
allOf:
- if:
properties:
compatible:
contains:
const: socionext,uniphier-pro5-pcie-phy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: gio
- const: link
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: gio
- const: link
else:
properties:
clocks:
maxItems: 1
clock-names:
const: link
resets:
maxItems: 1
reset-names:
const: link
required:
- compatible
- reg

3
Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml
View File

@ -43,6 +43,9 @@ patternProperties:
"#phy-cells":
const: 0
vbus-supply:
description: A phandle to the regulator for USB VBUS, only for USB host
required:
- reg
- "#phy-cells"

89
Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml
View File

@ -31,27 +31,15 @@ properties:
const: 0
clocks:
minItems: 1
minItems: 2
maxItems: 3
clock-names:
oneOf:
- const: link # for PXs2
- items: # for PXs3 with phy-ext
- const: link
- const: phy
- const: phy-ext
- items: # for others
- const: link
- const: phy
clock-names: true
resets:
maxItems: 2
reset-names:
items:
- const: link
- const: phy
reset-names: true
vbus-supply:
description: A phandle to the regulator for USB VBUS
@ -74,6 +62,77 @@ properties:
required for each port, if any one is omitted, the trimming data
of the port will not be set at all.
allOf:
- if:
properties:
compatible:
contains:
const: socionext,uniphier-pro5-usb3-hsphy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: gio
- const: link
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: gio
- const: link
- if:
properties:
compatible:
contains:
enum:
- socionext,uniphier-pxs2-usb3-hsphy
- socionext,uniphier-ld20-usb3-hsphy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: link
- const: phy
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
- if:
properties:
compatible:
contains:
enum:
- socionext,uniphier-pxs3-usb3-hsphy
- socionext,uniphier-nx1-usb3-hsphy
then:
properties:
clocks:
minItems: 2
maxItems: 3
clock-names:
minItems: 2
items:
- const: link
- const: phy
- const: phy-ext
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
required:
- compatible
- reg

98
Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml
View File

@ -35,33 +35,88 @@ properties:
minItems: 2
maxItems: 3
clock-names:
oneOf:
- items: # for Pro4, Pro5
- const: gio
- const: link
- items: # for PXs3 with phy-ext
- const: link
- const: phy
- const: phy-ext
- items: # for others
- const: link
- const: phy
clock-names: true
resets:
maxItems: 2
reset-names:
oneOf:
- items: # for Pro4,Pro5
- const: gio
- const: link
- items: # for others
- const: link
- const: phy
reset-names: true
vbus-supply:
description: A phandle to the regulator for USB VBUS
description: A phandle to the regulator for USB VBUS, only for USB host
allOf:
- if:
properties:
compatible:
contains:
enum:
- socionext,uniphier-pro4-usb3-ssphy
- socionext,uniphier-pro5-usb3-ssphy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: gio
- const: link
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: gio
- const: link
- if:
properties:
compatible:
contains:
enum:
- socionext,uniphier-pxs2-usb3-ssphy
- socionext,uniphier-ld20-usb3-ssphy
then:
properties:
clocks:
minItems: 2
maxItems: 2
clock-names:
items:
- const: link
- const: phy
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
- if:
properties:
compatible:
contains:
enum:
- socionext,uniphier-pxs3-usb3-ssphy
- socionext,uniphier-nx1-usb3-ssphy
then:
properties:
clocks:
minItems: 2
maxItems: 3
clock-names:
minItems: 2
items:
- const: link
- const: phy
- const: phy-ext
resets:
minItems: 2
maxItems: 2
reset-names:
items:
- const: link
- const: phy
required:
- compatible
@ -71,7 +126,6 @@ required:
- clock-names
- resets
- reset-names
- vbus-supply
additionalProperties: false

4
Documentation/devicetree/bindings/regulator/mt6315-regulator.yaml
View File

@ -55,7 +55,7 @@ examples:
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1193750>;
regulator-enable-ramp-delay = <256>;
regulator-allowed-modes = <0 1 2 4>;
regulator-allowed-modes = <0 1 2>;
};
vbuck3 {
@ -63,7 +63,7 @@ examples:
regulator-min-microvolt = <300000>;
regulator-max-microvolt = <1193750>;
regulator-enable-ramp-delay = <256>;
regulator-allowed-modes = <0 1 2 4>;
regulator-allowed-modes = <0 1 2>;
};
};
};

2
Documentation/devicetree/bindings/reset/qcom,aoss-reset.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm AOSS Reset Controller
maintainers:
- Sibi Sankar <sibis@codeaurora.org>
- Sibi Sankar <quic_sibis@quicinc.com>
description:
The bindings describe the reset-controller found on AOSS-CC (always on

2
Documentation/devicetree/bindings/reset/qcom,pdc-global.yaml
View File

@ -7,7 +7,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml#
title: Qualcomm PDC Global
maintainers:
- Sibi Sankar <sibis@codeaurora.org>
- Sibi Sankar <quic_sibis@quicinc.com>
description:
The bindings describes the reset-controller found on PDC-Global (Power Domain

2
Documentation/devicetree/bindings/riscv/microchip.yaml
View File

@ -20,6 +20,8 @@ properties:
items:
- enum:
- microchip,mpfs-icicle-kit
- microchip,mpfs-icicle-reference-rtlv2203
- sundance,polarberry
- const: microchip,mpfs
additionalProperties: true

4
Documentation/devicetree/bindings/serial/fsl-lpuart.yaml
View File

@ -23,7 +23,9 @@ properties:
- fsl,imx8qxp-lpuart
- fsl,imxrt1050-lpuart
- items:
- const: fsl,imx8ulp-lpuart
- enum:
- fsl,imx93-lpuart
- fsl,imx8ulp-lpuart
- const: fsl,imx7ulp-lpuart
- items:
- enum:

86
Documentation/devicetree/bindings/serial/qcom,serial-geni-qcom.yaml Normal file
View File

@ -0,0 +1,86 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: "http://devicetree.org/schemas/serial/qcom,serial-geni-qcom.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Qualcomm Geni based QUP UART interface
maintainers:
- Andy Gross <agross@kernel.org>
- Bjorn Andersson <bjorn.andersson@linaro.org>
allOf:
- $ref: /schemas/serial/serial.yaml#
properties:
compatible:
enum:
- qcom,geni-uart
- qcom,geni-debug-uart
clocks:
maxItems: 1
clock-names:
const: se
interconnects:
maxItems: 2
interconnect-names:
items:
- const: qup-core
- const: qup-config
interrupts:
minItems: 1
items:
- description: UART core irq
- description: Wakeup irq (RX GPIO)
operating-points-v2: true
pinctrl-0: true
pinctrl-1: true
pinctrl-names:
minItems: 1
items:
- const: default
- const: sleep
power-domains:
maxItems: 1
reg:
maxItems: 1
required:
- compatible
- clocks
- clock-names
- interrupts
- reg
unevaluatedProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/clock/qcom,gcc-sc7180.h>
#include <dt-bindings/interconnect/qcom,sc7180.h>
serial@a88000 {
compatible = "qcom,geni-uart";
reg = <0xa88000 0x7000>;
interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
clock-names = "se";
clocks = <&gcc GCC_QUPV3_WRAP0_S0_CLK>;
pinctrl-0 = <&qup_uart0_default>;
pinctrl-names = "default";
interconnects = <&qup_virt MASTER_QUP_CORE_0 0 &qup_virt SLAVE_QUP_CORE_0 0>,
<&gem_noc MASTER_APPSS_PROC 0 &config_noc SLAVE_QUP_0 0>;
interconnect-names = "qup-core", "qup-config";
};
...

37
Documentation/devicetree/bindings/serial/renesas,em-uart.yaml
View File

@ -9,12 +9,16 @@ title: Renesas EMMA Mobile UART Interface
maintainers:
- Magnus Damm <magnus.damm@gmail.com>
allOf:
- $ref: serial.yaml#
properties:
compatible:
const: renesas,em-uart
oneOf:
- items:
- enum:
- renesas,r9a09g011-uart # RZ/V2M
- const: renesas,em-uart # generic EMMA Mobile compatible UART
- items:
- const: renesas,em-uart # generic EMMA Mobile compatible UART
reg:
maxItems: 1
@ -23,10 +27,31 @@ properties:
maxItems: 1
clocks:
maxItems: 1
minItems: 1
items:
- description: UART functional clock
- description: Internal clock to access the registers
clock-names:
const: sclk
minItems: 1
items:
- const: sclk
- const: pclk
allOf:
- $ref: serial.yaml#
- if:
properties:
compatible:
contains:
const: renesas,r9a09g011-uart
then:
properties:
clocks:
minItems: 2
clock-names:
minItems: 2
required:
- compatible

9
Documentation/devicetree/bindings/serial/renesas,hscif.yaml
View File

@ -51,10 +51,16 @@ properties:
- renesas,hscif-r8a77980 # R-Car V3H
- renesas,hscif-r8a77990 # R-Car E3
- renesas,hscif-r8a77995 # R-Car D3
- renesas,hscif-r8a779a0 # R-Car V3U
- const: renesas,rcar-gen3-hscif # R-Car Gen3 and RZ/G2
- const: renesas,hscif # generic HSCIF compatible UART
- items:
- enum:
- renesas,hscif-r8a779a0 # R-Car V3U
- renesas,hscif-r8a779g0 # R-Car V4H
- const: renesas,rcar-gen4-hscif # R-Car Gen4
- const: renesas,hscif # generic HSCIF compatible UART
reg:
maxItems: 1
@ -113,6 +119,7 @@ if:
enum:
- renesas,rcar-gen2-hscif
- renesas,rcar-gen3-hscif
- renesas,rcar-gen4-hscif
then:
required:
- resets

2
Documentation/devicetree/bindings/serial/renesas,scif.yaml
View File

@ -60,12 +60,12 @@ properties:
- renesas,scif-r8a77980 # R-Car V3H
- renesas,scif-r8a77990 # R-Car E3
- renesas,scif-r8a77995 # R-Car D3
- renesas,scif-r8a779a0 # R-Car V3U
- const: renesas,rcar-gen3-scif # R-Car Gen3 and RZ/G2
- const: renesas,scif # generic SCIF compatible UART
- items:
- enum:
- renesas,scif-r8a779a0 # R-Car V3U
- renesas,scif-r8a779f0 # R-Car S4-8
- const: renesas,rcar-gen4-scif # R-Car Gen4
- const: renesas,scif # generic SCIF compatible UART

5
Documentation/devicetree/bindings/serial/rs485.yaml
View File

@ -33,6 +33,11 @@ properties:
description: drive RTS low when sending (default is high).
$ref: /schemas/types.yaml#/definitions/flag
rs485-rx-active-high:
description: Polarity of receiver enable signal (when separate from RTS).
True indicates active high (default is low).
$ref: /schemas/types.yaml#/definitions/flag
linux,rs485-enabled-at-boot-time:
description: enables the rs485 feature at boot time. It can be disabled
later with proper ioctl.

5
Documentation/devicetree/bindings/serial/socionext,uniphier-uart.yaml
View File

@ -20,7 +20,10 @@ properties:
maxItems: 1
clocks:
minItems: 1
maxItems: 1
resets:
maxItems: 1
auto-flow-control:
description: enable automatic flow control support.

2
Documentation/devicetree/bindings/soc/imx/fsl,imx8mp-media-blk-ctrl.yaml
View File

@ -88,7 +88,7 @@ examples:
<&mediamix_pd>, <&ispdwp_pd>, <&ispdwp_pd>,
<&mipi_phy2_pd>;
power-domain-names = "bus", "mipi-dsi1", "mipi-csi1", "lcdif1", "isi",
"mipi-csi2", "lcdif2", "isp1", "dwe", "mipi-dsi2";
"mipi-csi2", "lcdif2", "isp", "dwe", "mipi-dsi2";
clocks = <&clk IMX8MP_CLK_MEDIA_APB_ROOT>,
<&clk IMX8MP_CLK_MEDIA_AXI_ROOT>,
<&clk IMX8MP_CLK_MEDIA_CAM1_PIX_ROOT>,

51
Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml Normal file
View File

@ -0,0 +1,51 @@
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
# Copyright (C) 2022, Intel Corporation
%YAML 1.2
---
$id: "http://devicetree.org/schemas/soc/intel/intel,hps-copy-engine.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: Intel HPS Copy Engine
maintainers:
- Matthew Gerlach <matthew.gerlach@linux.intel.com>
description: |
The Intel Hard Processor System (HPS) Copy Engine is an IP block used to copy
a bootable image from host memory to HPS DDR. Additionally, there is a
register the HPS can use to indicate the state of booting the copied image as
well as a keep-a-live indication to the host.
properties:
compatible:
const: intel,hps-copy-engine
'#dma-cells':
const: 1
reg:
maxItems: 1
required:
- compatible
- reg
additionalProperties: false
examples:
- |
bus@80000000 {
compatible = "simple-bus";
reg = <0x80000000 0x60000000>,
<0xf9000000 0x00100000>;
reg-names = "axi_h2f", "axi_h2f_lw";
#address-cells = <2>;
#size-cells = <1>;
ranges = <0x00000000 0x00000000 0xf9000000 0x00001000>;
dma-controller@0 {
compatible = "intel,hps-copy-engine";
reg = <0x00000000 0x00000000 0x00001000>;
#dma-cells = <1>;
};
};

4
Documentation/devicetree/bindings/soc/qcom/qcom,smd.yaml
View File

@ -66,9 +66,7 @@ patternProperties:
The identifier for the remote processor as known by the rest of the
system.
# Binding for edge subnodes is not complete
patternProperties:
"^rpm-requests$":
rpm-requests:
type: object
description:
In turn, subnodes of the "edges" represent devices tied to SMD

14
Documentation/devicetree/bindings/soundwire/qcom,sdw.txt
View File

@ -162,6 +162,18 @@ board specific bus parameters.
or applicable for the respective data port.
More info in MIPI Alliance SoundWire 1.0 Specifications.
- reset:
Usage: optional
Value type: <prop-encoded-array>
Definition: Should specify the SoundWire audio CSR reset controller interface,
which is required for SoundWire version 1.6.0 and above.
- reset-names:
Usage: optional
Value type: <stringlist>
Definition: should be "swr_audio_cgcr" for SoundWire audio CSR reset
controller interface.
Note:
More Information on detail of encoding of these fields can be
found in MIPI Alliance SoundWire 1.0 Specifications.
@ -180,6 +192,8 @@ soundwire: soundwire@c85 {
interrupts = <20 IRQ_TYPE_EDGE_RISING>;
clocks = <&wcc>;
clock-names = "iface";
resets = <&lpass_audiocc LPASS_AUDIO_SWR_TX_CGCR>;
reset-names = "swr_audio_cgcr";
#sound-dai-cells = <1>;
qcom,dports-type = <0>;
qcom,dout-ports = <6>;

47
Documentation/devicetree/bindings/timer/hpe,gxp-timer.yaml Normal file
View File

@ -0,0 +1,47 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/timer/hpe,gxp-timer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: HPE GXP Timer
maintainers:
- Nick Hawkins <nick.hawkins@hpe.com>
- Jean-Marie Verdun <verdun@hpe.com>
properties:
compatible:
const: hpe,gxp-timer
reg:
maxItems: 1
interrupts:
maxItems: 1
clocks:
maxItems: 1
clock-names:
const: iop
required:
- compatible
- reg
- interrupts
- clocks
- clock-names
additionalProperties: false
examples:
- |
timer@c0000000 {
compatible = "hpe,gxp-timer";
reg = <0x80 0x16>;
interrupts = <0>;
interrupt-parent = <&vic0>;
clocks = <&iopclk>;
clock-names = "iop";
};

1
Documentation/devicetree/bindings/timer/mediatek,mtk-timer.txt
View File

@ -23,6 +23,7 @@ Required properties:
For those SoCs that use SYST
* "mediatek,mt8183-timer" for MT8183 compatible timers (SYST)
* "mediatek,mt8186-timer" for MT8186 compatible timers (SYST)
* "mediatek,mt8192-timer" for MT8192 compatible timers (SYST)
* "mediatek,mt8195-timer" for MT8195 compatible timers (SYST)
* "mediatek,mt7629-timer" for MT7629 compatible timers (SYST)

29
Documentation/devicetree/bindings/timestamp/hardware-timestamps-common.yaml Normal file
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@ -0,0 +1,29 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/timestamp/hardware-timestamps-common.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Hardware timestamp providers
maintainers:
- Dipen Patel <dipenp@nvidia.com>
description:
Some devices/SoCs have hardware timestamp engines (HTE) which can use
hardware means to timestamp entity in realtime. The entity could be anything
from GPIOs, IRQs, Bus and so on. The hardware timestamp engine present
itself as a provider with the bindings described in this document.
properties:
$nodename:
pattern: "^timestamp(@.*|-[0-9a-f])?$"
"#timestamp-cells":
description:
Number of cells in a HTE specifier.
required:
- "#timestamp-cells"
additionalProperties: true

39
Documentation/devicetree/bindings/timestamp/hte-consumer.yaml Normal file
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@ -0,0 +1,39 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/timestamp/hte-consumer.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: HTE Consumer Device Tree Bindings
maintainers:
- Dipen Patel <dipenp@nvidia.com>
select: true
properties:
timestamps:
$ref: /schemas/types.yaml#/definitions/phandle-array
description:
The list of HTE provider phandle. The first cell must represent the
provider phandle followed by the line identifiers. The meaning of the
line identifier and exact number of arguments must be specified in the
HTE provider device tree binding document.
timestamp-names:
$ref: /schemas/types.yaml#/definitions/string-array
description:
An optional string property to label each line specifier present in the
timestamp property.
dependencies:
timestamp-names: [ timestamps ]
additionalProperties: true
examples:
- |
hte_tegra_consumer {
timestamps = <&tegra_hte_aon 0x9>, <&tegra_hte_lic 0x19>;
timestamp-names = "hte-gpio", "hte-i2c";
};

88
Documentation/devicetree/bindings/timestamp/nvidia,tegra194-hte.yaml Normal file
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@ -0,0 +1,88 @@
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/timestamp/nvidia,tegra194-hte.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: Tegra194 on chip generic hardware timestamping engine (HTE)
maintainers:
- Dipen Patel <dipenp@nvidia.com>
description:
Tegra SoC has two instances of generic hardware timestamping engines (GTE)
known as GTE GPIO and GTE IRQ, which can monitor subset of GPIO and on chip
IRQ lines for the state change respectively, upon detection it will record
timestamp (taken from system counter) in its internal hardware FIFO. It has
a bitmap array arranged in 32bit slices where each bit represent signal/line
to enable or disable for the hardware timestamping. The GTE GPIO monitors
GPIO lines from the AON (always on) GPIO controller.
properties:
compatible:
enum:
- nvidia,tegra194-gte-aon
- nvidia,tegra194-gte-lic
reg:
maxItems: 1
interrupts:
maxItems: 1
nvidia,int-threshold:
$ref: /schemas/types.yaml#/definitions/uint32
description:
HTE device generates its interrupt based on this u32 FIFO threshold
value. The recommended value is 1.
minimum: 1
maximum: 256
nvidia,slices:
$ref: /schemas/types.yaml#/definitions/uint32
description:
HTE lines are arranged in 32 bit slice where each bit represents different
line/signal that it can enable/configure for the timestamp. It is u32
property and depends on the HTE instance in the chip. The value 3 is for
GPIO GTE and 11 for IRQ GTE.
enum: [3, 11]
'#timestamp-cells':
description:
This represents number of line id arguments as specified by the
consumers. For the GTE IRQ, this is IRQ number as mentioned in the
SoC technical reference manual. For the GTE GPIO, its value is same as
mentioned in the nvidia GPIO device tree binding document.
const: 1
required:
- compatible
- reg
- interrupts
- nvidia,slices
- "#timestamp-cells"
additionalProperties: false
examples:
- |
tegra_hte_aon: timestamp@c1e0000 {
compatible = "nvidia,tegra194-gte-aon";
reg = <0xc1e0000 0x10000>;
interrupts = <0 13 0x4>;
nvidia,int-threshold = <1>;
nvidia,slices = <3>;
#timestamp-cells = <1>;
};
- |
tegra_hte_lic: timestamp@3aa0000 {
compatible = "nvidia,tegra194-gte-lic";
reg = <0x3aa0000 0x10000>;
interrupts = <0 11 0x4>;
nvidia,int-threshold = <1>;
nvidia,slices = <11>;
#timestamp-cells = <1>;
};
...

7
Documentation/devicetree/bindings/usb/am33xx-usb.txt
View File

@ -61,8 +61,9 @@ DMA
endpoint number (0 … 14 for endpoints 1 … 15 on instance 0 and 15 … 29
for endpoints 1 … 15 on instance 1). The second number is 0 for RX and
1 for TX transfers.
- #dma-channels: should be set to 30 representing the 15 endpoints for
- dma-channels: should be set to 30 representing the 15 endpoints for
each USB instance.
- #dma-channels: deprecated
Example:
~~~~~~~~
@ -193,7 +194,7 @@ usb: usb@47400000 {
interrupts = <17>;
interrupt-names = "glue";
#dma-cells = <2>;
#dma-channels = <30>;
#dma-requests = <256>;
dma-channels = <30>;
dma-requests = <256>;
};
};

5
Documentation/devicetree/bindings/usb/da8xx-usb.txt
View File

@ -36,7 +36,8 @@ DMA
- #dma-cells: should be set to 2. The first number represents the
channel number (0 … 3 for endpoints 1 … 4).
The second number is 0 for RX and 1 for TX transfers.
- #dma-channels: should be set to 4 representing the 4 endpoints.
- dma-channels: should be set to 4 representing the 4 endpoints.
- #dma-channels: deprecated
Example:
usb_phy: usb-phy {
@ -74,7 +75,7 @@ Example:
reg-names = "controller", "scheduler", "queuemgr";
interrupts = <58>;
#dma-cells = <2>;
#dma-channels = <4>;
dma-channels = <4>;
};
};

7
Documentation/devicetree/bindings/usb/dwc2.yaml
View File

@ -17,6 +17,13 @@ properties:
oneOf:
- const: brcm,bcm2835-usb
- const: hisilicon,hi6220-usb
- const: ingenic,jz4775-otg
- const: ingenic,jz4780-otg
- const: ingenic,x1000-otg
- const: ingenic,x1600-otg
- const: ingenic,x1700-otg
- const: ingenic,x1830-otg
- const: ingenic,x2000-otg
- items:
- const: rockchip,rk3066-usb
- const: snps,dwc2

4
Documentation/devicetree/bindings/usb/dwc3-xilinx.yaml
View File

@ -71,6 +71,10 @@ properties:
- usb2-phy
- usb3-phy
reset-gpios:
description: GPIO used for the reset ulpi-phy
maxItems: 1
# Required child node:
patternProperties:

72
Documentation/devicetree/bindings/usb/fcs,fsa4480.yaml Normal file
View File

@ -0,0 +1,72 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: "http://devicetree.org/schemas/usb/fcs,fsa4480.yaml#"
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
title: ON Semiconductor Analog Audio Switch
maintainers:
- Bjorn Andersson <bjorn.andersson@linaro.org>
properties:
compatible:
enum:
- fcs,fsa4480
reg:
maxItems: 1
interrupts:
maxItems: 1
vcc-supply:
description: power supply (2.7V-5.5V)
mode-switch:
description: Flag the port as possible handle of altmode switching
type: boolean
orientation-switch:
description: Flag the port as possible handler of orientation switching
type: boolean
port:
$ref: /schemas/graph.yaml#/properties/port
description:
A port node to link the FSA4480 to a TypeC controller for the purpose of
handling altmode muxing and orientation switching.
required:
- compatible
- reg
- port
additionalProperties: false
examples:
- |
#include <dt-bindings/interrupt-controller/irq.h>
i2c13 {
#address-cells = <1>;
#size-cells = <0>;
fsa4480@42 {
compatible = "fcs,fsa4480";
reg = <0x42>;
interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
vcc-supply = <&vreg_bob>;
mode-switch;
orientation-switch;
port {
fsa4480_ept: endpoint {
remote-endpoint = <&typec_controller>;
};
};
};
};
...

1
Documentation/devicetree/bindings/usb/generic-ehci.yaml
View File

@ -55,6 +55,7 @@ properties:
- brcm,bcm7420-ehci
- brcm,bcm7425-ehci
- brcm,bcm7435-ehci
- hpe,gxp-ehci
- ibm,476gtr-ehci
- nxp,lpc1850-ehci
- qca,ar7100-ehci

1
Documentation/devicetree/bindings/usb/generic-ohci.yaml
View File

@ -42,6 +42,7 @@ properties:
- brcm,bcm7420-ohci
- brcm,bcm7425-ohci
- brcm,bcm7435-ohci
- hpe,gxp-ohci
- ibm,476gtr-ohci
- ingenic,jz4740-ohci
- snps,hsdk-v1.0-ohci

1
Documentation/devicetree/bindings/usb/mediatek,mtu3.yaml
View File

@ -25,6 +25,7 @@ properties:
- mediatek,mt8173-mtu3
- mediatek,mt8183-mtu3
- mediatek,mt8192-mtu3
- mediatek,mt8195-mtu3
- const: mediatek,mtu3
reg:

227
Documentation/devicetree/bindings/usb/qcom,dwc3.yaml
View File

@ -16,16 +16,21 @@ properties:
- qcom,ipq4019-dwc3
- qcom,ipq6018-dwc3
- qcom,ipq8064-dwc3
- qcom,ipq8074-dwc3
- qcom,msm8953-dwc3
- qcom,msm8994-dwc3
- qcom,msm8996-dwc3
- qcom,msm8998-dwc3
- qcom,qcs404-dwc3
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
- qcom,sdm660-dwc3
- qcom,sdm845-dwc3
- qcom,sdx55-dwc3
- qcom,sdx65-dwc3
- qcom,sm4250-dwc3
- qcom,sm6115-dwc3
- qcom,sm6125-dwc3
- qcom,sm6350-dwc3
- qcom,sm8150-dwc3
- qcom,sm8250-dwc3
@ -50,26 +55,22 @@ properties:
maxItems: 1
clocks:
description:
A list of phandle and clock-specifier pairs for the clocks
listed in clock-names.
items:
- description: System Config NOC clock.
- description: Master/Core clock, has to be >= 125 MHz
for SS operation and >= 60MHz for HS operation.
- description: System bus AXI clock.
- description: Mock utmi clock needed for ITP/SOF generation
in host mode. Its frequency should be 19.2MHz.
- description: Sleep clock, used for wakeup when
USB3 core goes into low power mode (U3).
description: |
Several clocks are used, depending on the variant. Typical ones are::
- cfg_noc:: System Config NOC clock.
- core:: Master/Core clock, has to be >= 125 MHz for SS operation and >=
60MHz for HS operation.
- iface:: System bus AXI clock.
- sleep:: Sleep clock, used for wakeup when USB3 core goes into low
power mode (U3).
- mock_utmi:: Mock utmi clock needed for ITP/SOF generation in host
mode. Its frequency should be 19.2MHz.
minItems: 1
maxItems: 6
clock-names:
items:
- const: cfg_noc
- const: core
- const: iface
- const: mock_utmi
- const: sleep
minItems: 1
maxItems: 6
assigned-clocks:
items:
@ -132,6 +133,185 @@ required:
- interrupts
- interrupt-names
allOf:
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq4019-dwc3
then:
properties:
clocks:
maxItems: 3
clock-names:
items:
- const: core
- const: sleep
- const: mock_utmi
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq8064-dwc3
then:
properties:
clocks:
items:
- description: Master/Core clock, has to be >= 125 MHz
for SS operation and >= 60MHz for HS operation.
clock-names:
items:
- const: core
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8953-dwc3
- qcom,msm8996-dwc3
- qcom,msm8998-dwc3
- qcom,sc7180-dwc3
- qcom,sc7280-dwc3
- qcom,sdm845-dwc3
- qcom,sdx55-dwc3
- qcom,sm6350-dwc3
then:
properties:
clocks:
maxItems: 5
clock-names:
items:
- const: cfg_noc
- const: core
- const: iface
- const: sleep
- const: mock_utmi
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq6018-dwc3
then:
properties:
clocks:
minItems: 3
maxItems: 4
clock-names:
oneOf:
- items:
- const: core
- const: sleep
- const: mock_utmi
- items:
- const: cfg_noc
- const: core
- const: sleep
- const: mock_utmi
- if:
properties:
compatible:
contains:
enum:
- qcom,ipq8074-dwc3
then:
properties:
clocks:
maxItems: 4
clock-names:
items:
- const: cfg_noc
- const: core
- const: sleep
- const: mock_utmi
- if:
properties:
compatible:
contains:
enum:
- qcom,msm8994-dwc3
- qcom,qcs404-dwc3
then:
properties:
clocks:
maxItems: 4
clock-names:
items:
- const: core
- const: iface
- const: sleep
- const: mock_utmi
- if:
properties:
compatible:
contains:
enum:
- qcom,sdm660-dwc3
then:
properties:
clocks:
minItems: 6
clock-names:
items:
- const: cfg_noc
- const: core
- const: iface
- const: sleep
- const: mock_utmi
- const: bus
- if:
properties:
compatible:
contains:
enum:
- qcom,sm6125-dwc3
- qcom,sm8150-dwc3
- qcom,sm8250-dwc3
- qcom,sm8450-dwc3
then:
properties:
clocks:
minItems: 6
clock-names:
items:
- const: cfg_noc
- const: core
- const: iface
- const: sleep
- const: mock_utmi
- const: xo
- if:
properties:
compatible:
contains:
enum:
- qcom,sm8350-dwc3
then:
properties:
clocks:
minItems: 5
maxItems: 6
clock-names:
minItems: 5
items:
- const: cfg_noc
- const: core
- const: iface
- const: sleep
- const: mock_utmi
- const: xo
additionalProperties: false
examples:
@ -153,10 +333,13 @@ examples:
clocks = <&gcc GCC_CFG_NOC_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>,
<&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_SLEEP_CLK>;
clock-names = "cfg_noc", "core", "iface", "mock_utmi",
"sleep";
<&gcc GCC_USB30_PRIM_SLEEP_CLK>,
<&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>;
clock-names = "cfg_noc",
"core",
"iface",
"sleep",
"mock_utmi";
assigned-clocks = <&gcc GCC_USB30_PRIM_MOCK_UTMI_CLK>,
<&gcc GCC_USB30_PRIM_MASTER_CLK>;

4
Documentation/devicetree/bindings/usb/renesas,usbhs.yaml
View File

@ -19,6 +19,7 @@ properties:
- items:
- enum:
- renesas,usbhs-r7s9210 # RZ/A2
- renesas,usbhs-r9a07g043 # RZ/G2UL
- renesas,usbhs-r9a07g044 # RZ/G2{L,LC}
- renesas,usbhs-r9a07g054 # RZ/V2L
- const: renesas,rza2-usbhs
@ -118,6 +119,7 @@ allOf:
compatible:
contains:
enum:
- renesas,usbhs-r9a07g043
- renesas,usbhs-r9a07g044
- renesas,usbhs-r9a07g054
then:
@ -128,6 +130,8 @@ allOf:
- description: U2P_INT_DMA[0]
- description: U2P_INT_DMA[1]
- description: U2P_INT_DMAERR
required:
- resets
else:
properties:
interrupts:

15
Documentation/devicetree/bindings/usb/samsung,exynos-usb2.yaml
View File

@ -15,9 +15,6 @@ properties:
- samsung,exynos4210-ehci
- samsung,exynos4210-ohci
'#address-cells':
const: 1
clocks:
maxItems: 1
@ -46,15 +43,6 @@ properties:
Only for controller in EHCI mode, if present, specifies the GPIO that
needs to be pulled up for the bus to be powered.
'#size-cells':
const: 0
patternProperties:
"^.*@[0-9a-f]{1,2}$":
description: The hard wired USB devices
type: object
$ref: /usb/usb-device.yaml
required:
- compatible
- clocks
@ -65,6 +53,7 @@ required:
- reg
allOf:
- $ref: usb-hcd.yaml#
- if:
properties:
compatible:
@ -74,7 +63,7 @@ allOf:
properties:
samsung,vbus-gpio: false
additionalProperties: false
unevaluatedProperties: false
examples:
- |

2
Documentation/devicetree/bindings/usb/snps,dwc3.yaml
View File

@ -68,6 +68,8 @@ properties:
- enum: [bus_early, ref, suspend]
- true
dma-coherent: true
iommus:
maxItems: 1

103
Documentation/devicetree/bindings/usb/ti,am62-usb.yaml Normal file
View File

@ -0,0 +1,103 @@
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
%YAML 1.2
---
$id: http://devicetree.org/schemas/usb/ti,am62-usb.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#
title: TI's AM62 wrapper module for the Synopsys USBSS-DRD controller
maintainers:
- Aswath Govindraju <a-govindraju@ti.com>
properties:
compatible:
const: ti,am62-usb
reg:
maxItems: 1
ranges: true
power-domains:
description:
PM domain provider node and an args specifier containing
the USB ISO device id value. See,
Documentation/devicetree/bindings/soc/ti/sci-pm-domain.yaml
maxItems: 1
clocks:
description: Clock phandle to usb2_refclk
maxItems: 1
clock-names:
items:
- const: ref
ti,vbus-divider:
description:
Should be present if USB VBUS line is connected to the
VBUS pin of the SoC via a 1/3 voltage divider.
type: boolean
ti,syscon-phy-pll-refclk:
$ref: /schemas/types.yaml#/definitions/phandle-array
items:
- items:
- description: Phandle to the SYSCON entry
- description: USB phy control register offset within SYSCON
description:
Specifier for conveying frequency of ref clock input, for the
operation of USB2PHY.
'#address-cells':
const: 2
'#size-cells':
const: 2
patternProperties:
"^usb@[0-9a-f]+$":
$ref: snps,dwc3.yaml#
description: Required child node
required:
- compatible
- reg
- power-domains
- clocks
- clock-names
- ti,syscon-phy-pll-refclk
additionalProperties: false
examples:
- |
#include <dt-bindings/soc/ti,sci_pm_domain.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/gpio/gpio.h>
bus {
#address-cells = <2>;
#size-cells = <2>;
usbss1: usb@f910000 {
compatible = "ti,am62-usb";
reg = <0x00 0x0f910000 0x00 0x800>;
clocks = <&k3_clks 162 3>;
clock-names = "ref";
ti,syscon-phy-pll-refclk = <&wkup_conf 0x4018>;
power-domains = <&k3_pds 179 TI_SCI_PD_EXCLUSIVE>;
#address-cells = <2>;
#size-cells = <2>;
usb@31100000 {
compatible = "snps,dwc3";
reg =<0x00 0x31100000 0x00 0x50000>;
interrupts = <GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>, /* irq.0 */
<GIC_SPI 226 IRQ_TYPE_LEVEL_HIGH>; /* irq.0 */
interrupt-names = "host", "peripheral";
maximum-speed = "high-speed";
dr_mode = "otg";
};
};
};

2
Documentation/devicetree/bindings/vendor-prefixes.yaml
View File

@ -1207,6 +1207,8 @@ patternProperties:
description: Summit microelectronics
"^sunchip,.*":
description: Shenzhen Sunchip Technology Co., Ltd
"^sundance,.*":
description: Sundance DSP Inc.
"^sunplus,.*":
description: Sunplus Technology Co., Ltd.
"^SUNW,.*":

126
Documentation/driver-api/firmware/fw_upload.rst Normal file
View File

@ -0,0 +1,126 @@
.. SPDX-License-Identifier: GPL-2.0
===================
Firmware Upload API
===================
A device driver that registers with the firmware loader will expose
persistent sysfs nodes to enable users to initiate firmware updates for
that device. It is the responsibility of the device driver and/or the
device itself to perform any validation on the data received. Firmware
upload uses the same *loading* and *data* sysfs files described in the
documentation for firmware fallback. It also adds additional sysfs files
to provide status on the transfer of the firmware image to the device.
Register for firmware upload
============================
A device driver registers for firmware upload by calling
firmware_upload_register(). Among the parameter list is a name to
identify the device under /sys/class/firmware. A user may initiate a
firmware upload by echoing a 1 to the *loading* sysfs file for the target
device. Next, the user writes the firmware image to the *data* sysfs
file. After writing the firmware data, the user echos 0 to the *loading*
sysfs file to signal completion. Echoing 0 to *loading* also triggers the
transfer of the firmware to the lower-lever device driver in the context
of a kernel worker thread.
To use the firmware upload API, write a driver that implements a set of
ops. The probe function calls firmware_upload_register() and the remove
function calls firmware_upload_unregister() such as::
static const struct fw_upload_ops m10bmc_ops = {
.prepare = m10bmc_sec_prepare,
.write = m10bmc_sec_write,
.poll_complete = m10bmc_sec_poll_complete,
.cancel = m10bmc_sec_cancel,
.cleanup = m10bmc_sec_cleanup,
};
static int m10bmc_sec_probe(struct platform_device *pdev)
{
const char *fw_name, *truncate;
struct m10bmc_sec *sec;
struct fw_upload *fwl;
unsigned int len;
sec = devm_kzalloc(&pdev->dev, sizeof(*sec), GFP_KERNEL);
if (!sec)
return -ENOMEM;
sec->dev = &pdev->dev;
sec->m10bmc = dev_get_drvdata(pdev->dev.parent);
dev_set_drvdata(&pdev->dev, sec);
fw_name = dev_name(sec->dev);
truncate = strstr(fw_name, ".auto");
len = (truncate) ? truncate - fw_name : strlen(fw_name);
sec->fw_name = kmemdup_nul(fw_name, len, GFP_KERNEL);
fwl = firmware_upload_register(sec->dev, sec->fw_name, &m10bmc_ops, sec);
if (IS_ERR(fwl)) {
dev_err(sec->dev, "Firmware Upload driver failed to start\n");
kfree(sec->fw_name);
return PTR_ERR(fwl);
}
sec->fwl = fwl;
return 0;
}
static int m10bmc_sec_remove(struct platform_device *pdev)
{
struct m10bmc_sec *sec = dev_get_drvdata(&pdev->dev);
firmware_upload_unregister(sec->fwl);
kfree(sec->fw_name);
return 0;
}
firmware_upload_register
------------------------
.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.c
:identifiers: firmware_upload_register
firmware_upload_unregister
--------------------------
.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.c
:identifiers: firmware_upload_unregister
Firmware Upload Ops
-------------------
.. kernel-doc:: include/linux/firmware.h
:identifiers: fw_upload_ops
Firmware Upload Progress Codes
------------------------------
The following progress codes are used internally by the firmware loader.
Corresponding strings are reported through the status sysfs node that
is described below and are documented in the ABI documentation.
.. kernel-doc:: drivers/base/firmware_loader/sysfs_upload.h
:identifiers: fw_upload_prog
Firmware Upload Error Codes
---------------------------
The following error codes may be returned by the driver ops in case of
failure:
.. kernel-doc:: include/linux/firmware.h
:identifiers: fw_upload_err
Sysfs Attributes
================
In addition to the *loading* and *data* sysfs files, there are additional
sysfs files to monitor the status of the data transfer to the target
device and to determine the final pass/fail status of the transfer.
Depending on the device and the size of the firmware image, a firmware
update could take milliseconds or minutes.
The additional sysfs files are:
* status - provides an indication of the progress of a firmware update
* error - provides error information for a failed firmware update
* remaining_size - tracks the data transfer portion of an update
* cancel - echo 1 to this file to cancel the update

1
Documentation/driver-api/firmware/index.rst
View File

@ -8,6 +8,7 @@ Linux Firmware API
core
efi/index
request_firmware
fw_upload
other_interfaces
.. only:: subproject and html

1
Documentation/driver-api/index.rst
View File

@ -101,6 +101,7 @@ available subsections can be seen below.
surface_aggregator/index
switchtec
sync_file
tty/index
vfio-mediated-device
vfio
vfio-pci-device-specific-driver-acceptance

2
Documentation/driver-api/serial/driver.rst
View File

@ -311,7 +311,7 @@ hardware.
This call must not sleep
set_ldisc(port,termios)
Notifier for discipline change. See Documentation/tty/tty_ldisc.rst.
Notifier for discipline change. See ../tty/tty_ldisc.rst.
Locking: caller holds tty_port->mutex

2
Documentation/driver-api/serial/index.rst
View File

@ -16,8 +16,6 @@ Serial drivers
.. toctree::
:maxdepth: 1
moxa-smartio
n_gsm
serial-iso7816
serial-rs485

159
Documentation/driver-api/serial/n_gsm.rst
View File

@ -1,159 +0,0 @@
==============================
GSM 0710 tty multiplexor HOWTO
==============================
This line discipline implements the GSM 07.10 multiplexing protocol
detailed in the following 3GPP document:
https://www.3gpp.org/ftp/Specs/archive/07_series/07.10/0710-720.zip
This document give some hints on how to use this driver with GPRS and 3G
modems connected to a physical serial port.
How to use it
-------------
1. config initiator
^^^^^^^^^^^^^^^^^^^^^
1.1 initialize the modem in 0710 mux mode (usually AT+CMUX= command) through
its serial port. Depending on the modem used, you can pass more or less
parameters to this command.
1.2 switch the serial line to using the n_gsm line discipline by using
TIOCSETD ioctl.
1.3 configure the mux using GSMIOC_GETCONF / GSMIOC_SETCONF ioctl.
1.4 obtain base gsmtty number for the used serial port.
Major parts of the initialization program :
(a good starting point is util-linux-ng/sys-utils/ldattach.c)::
#include <stdio.h>
#include <stdint.h>
#include <linux/gsmmux.h>
#include <linux/tty.h>
#define DEFAULT_SPEED B115200
#define SERIAL_PORT /dev/ttyS0
int ldisc = N_GSM0710;
struct gsm_config c;
struct termios configuration;
uint32_t first;
/* open the serial port connected to the modem */
fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);
/* configure the serial port : speed, flow control ... */
/* send the AT commands to switch the modem to CMUX mode
and check that it's successful (should return OK) */
write(fd, "AT+CMUX=0\r", 10);
/* experience showed that some modems need some time before
being able to answer to the first MUX packet so a delay
may be needed here in some case */
sleep(3);
/* use n_gsm line discipline */
ioctl(fd, TIOCSETD, &ldisc);
/* get n_gsm configuration */
ioctl(fd, GSMIOC_GETCONF, &c);
/* we are initiator and need encoding 0 (basic) */
c.initiator = 1;
c.encapsulation = 0;
/* our modem defaults to a maximum size of 127 bytes */
c.mru = 127;
c.mtu = 127;
/* set the new configuration */
ioctl(fd, GSMIOC_SETCONF, &c);
/* get first gsmtty device node */
ioctl(fd, GSMIOC_GETFIRST, &first);
printf("first muxed line: /dev/gsmtty%i\n", first);
/* and wait for ever to keep the line discipline enabled */
daemon(0,0);
pause();
1.5 use these devices as plain serial ports.
for example, it's possible:
- and to use gnokii to send / receive SMS on ttygsm1
- to use ppp to establish a datalink on ttygsm2
1.6 first close all virtual ports before closing the physical port.
Note that after closing the physical port the modem is still in multiplexing
mode. This may prevent a successful re-opening of the port later. To avoid
this situation either reset the modem if your hardware allows that or send
a disconnect command frame manually before initializing the multiplexing mode
for the second time. The byte sequence for the disconnect command frame is::
0xf9, 0x03, 0xef, 0x03, 0xc3, 0x16, 0xf9.
2. config requester
^^^^^^^^^^^^^^^^^^^^^
2.1 receive string "AT+CMUX= command" through its serial port,initialize
mux mode config
2.2 switch the serial line to using the n_gsm line discipline by using
TIOCSETD ioctl.
2.3 configure the mux using GSMIOC_GETCONF / GSMIOC_SETCONF ioctl.
2.4 obtain base gsmtty number for the used serial port::
#include <stdio.h>
#include <stdint.h>
#include <linux/gsmmux.h>
#include <linux/tty.h>
#define DEFAULT_SPEED B115200
#define SERIAL_PORT /dev/ttyS0
int ldisc = N_GSM0710;
struct gsm_config c;
struct termios configuration;
uint32_t first;
/* open the serial port */
fd = open(SERIAL_PORT, O_RDWR | O_NOCTTY | O_NDELAY);
/* configure the serial port : speed, flow control ... */
/* get serial data and check "AT+CMUX=command" parameter ... */
/* use n_gsm line discipline */
ioctl(fd, TIOCSETD, &ldisc);
/* get n_gsm configuration */
ioctl(fd, GSMIOC_GETCONF, &c);
/* we are requester and need encoding 0 (basic) */
c.initiator = 0;
c.encapsulation = 0;
/* our modem defaults to a maximum size of 127 bytes */
c.mru = 127;
c.mtu = 127;
/* set the new configuration */
ioctl(fd, GSMIOC_SETCONF, &c);
/* get first gsmtty device node */
ioctl(fd, GSMIOC_GETFIRST, &first);
printf("first muxed line: /dev/gsmtty%i\n", first);
/* and wait for ever to keep the line discipline enabled */
daemon(0,0);
pause();
Additional Documentation
------------------------
More practical details on the protocol and how it's supported by industrial
modems can be found in the following documents :
- http://www.telit.com/module/infopool/download.php?id=616
- http://www.u-blox.com/images/downloads/Product_Docs/LEON-G100-G200-MuxImplementation_ApplicationNote_%28GSM%20G1-CS-10002%29.pdf
- http://www.sierrawireless.com/Support/Downloads/AirPrime/WMP_Series/~/media/Support_Downloads/AirPrime/Application_notes/CMUX_Feature_Application_Note-Rev004.ashx
- http://wm.sim.com/sim/News/photo/2010721161442.pdf
11-03-08 - Eric Bénard - <eric@eukrea.com>

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