ARM fixes for 5.13:
- fix gcc 10 compiler regression with cpu_init() -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEuNNh8scc2k/wOAE+9OeQG+StrGQFAmDQtuEACgkQ9OeQG+St rGRQDxAAhrHvJSAERsTLehvG1RgklwWAOvIQUogILXucMwYBP2BiQxMCA8WMpyO/ UM1ZWO08EMEwzILXdm5Fhi806lcRkbtr6IGzKJR01MtHctG2eywo0QJGTNZmt53j U2tQuNAuhTTd1N14eybZsAdgWmGCKgtBmhvW5alSoFB6jt94YQ8ZXcg+bzHvJ/i9 8NdCleBv6oyLceMPW0j8iiMChKxxi/r267MVZUCu4VCc7geLU2Vf8buI5l8jbT5w 8vR/tbHomlUwXfiCrBwmYE7YYt/dJMXUSMFPUpn+sj3c+gA28lfEPKNLe9JpI+r3 Mow0usg8jJu0n8wyAc/AKnhLK/zBiB7Jcmj9Ue0Bf8h7cosSZt/OVfYzA+bBDMar v78/rQv9g4VcBtYjMvzkDBzGUGdvdDtGdl2ghJgYlNI6nVAf5bvIyMKkUUciFB7m 6Jdy+EWIOSvqS72prpCh+2sSIS4tcCNiW0sPMhSeM5pu1VlCUTB8u6s5h8sp1+3h ZO4n5hcGO1lhTnJzLavufEeu5V6Kw33isKP5ZQ7L+s3cblzJuRmh0DVPqq0WI7bh mnP0BbcuVJANo+yrfQGos3XD4gZ19IWxSyu8ks0yJtFm2h+W1aXecrxQXk9t+EXh k+mWLAf00wEkaHvvGTuICswsj5aAKj0sLoIySXQPiFtZN1Nyn2I= =f79T -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm Pull ARM fix from Russell King: - fix gcc 10 compiler regression with cpu_init() * tag 'for-linus' of git://git.armlinux.org.uk/~rmk/linux-arm: ARM: 9081/1: fix gcc-10 thumb2-kernel regression
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commit
a96bfed64c
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@ -545,9 +545,11 @@ void notrace cpu_init(void)
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* In Thumb-2, msr with an immediate value is not allowed.
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*/
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#ifdef CONFIG_THUMB2_KERNEL
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#define PLC "r"
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#define PLC_l "l"
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#define PLC_r "r"
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#else
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#define PLC "I"
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#define PLC_l "I"
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#define PLC_r "I"
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#endif
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/*
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@ -569,15 +571,15 @@ void notrace cpu_init(void)
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"msr cpsr_c, %9"
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:
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: "r" (stk),
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PLC (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
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PLC_r (PSR_F_BIT | PSR_I_BIT | IRQ_MODE),
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"I" (offsetof(struct stack, irq[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
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PLC_r (PSR_F_BIT | PSR_I_BIT | ABT_MODE),
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"I" (offsetof(struct stack, abt[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | UND_MODE),
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PLC_r (PSR_F_BIT | PSR_I_BIT | UND_MODE),
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"I" (offsetof(struct stack, und[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
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PLC_r (PSR_F_BIT | PSR_I_BIT | FIQ_MODE),
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"I" (offsetof(struct stack, fiq[0])),
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PLC (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
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PLC_l (PSR_F_BIT | PSR_I_BIT | SVC_MODE)
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: "r14");
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#endif
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}
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