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media: aspeed: Correct values for detected timing 

Correct timing's fp/sync/bp value based on the information below.
It should be noticed that the calculation formula should be changed
per sync polarity.

The sequence of signal: sync - backporch - video data - frontporch

The following registers start counting from sync's rising edge:
1. VR090: frame edge's left and right
2. VR094: frame edge's top and bottom
3. VR09C: counting from sync's rising edge to falling edge

[Vertical timing]
            +--+     +-------------------+     +--+
            |  |     |     v i d e o     |     |  |
         +--+  +-----+                   +-----+  +---+
       vsync+--+
   frame_top+--------+
frame_bottom+----------------------------+

                  +-------------------+
                  |     v i d e o     |
      +--+  +-----+                   +-----+  +---+
         |  |                               |  |
         +--+                               +--+
       vsync+-------------------------------+
   frame_top+-----+
frame_bottom+-------------------------+

[Horizontal timing]
            +--+     +-------------------+     +--+
            |  |     |     v i d e o     |     |  |
         +--+  +-----+                   +-----+  +---+
       hsync+--+
  frame_left+--------+
 frame_right+----------------------------+

                  +-------------------+
                  |     v i d e o     |
      +--+  +-----+                   +-----+  +---+
         |  |                               |  |
         +--+                               +--+
       hsync+-------------------------------+
  frame_left+-----+
 frame_right+-------------------------+

Ex. 1920x1200@60 whose vsync polarity is negative
  VR098: c4d3efff, VR09C: 04cc001f
  v-total = 0x4D3 (VR098[27:16]) = 1235
  v-sync  = 0x4CC (VR09C[27:16]) = 1228

[hverkuil: drop unused variable mds]

Signed-off-by: Jammy Huang <jammy_huang@aspeedtech.com>
Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org>
This commit is contained in:
Jammy Huang 2022-01-25 07:44:09 +01:00 committed by Mauro Carvalho Chehab
parent 26aea93bd5
commit a922a0cb05
1 changed files with 97 additions and 13 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

110
drivers/media/platform/aspeed-video.c
View File

@ -803,6 +803,99 @@ static void aspeed_video_calc_compressed_size(struct aspeed_video *video,
video->max_compressed_size);
}
/*
* Update v4l2_bt_timings per current status.
* frame_top/frame_bottom/frame_left/frame_right need to be ready.
*
* The following registers start counting from sync's rising edge:
* 1. VR090: frame edge's left and right
* 2. VR094: frame edge's top and bottom
* 3. VR09C: counting from sync's rising edge to falling edge
*
* [Vertical timing]
* +--+ +-------------------+ +--+
* | | | v i d e o | | |
* +--+ +-----+ +-----+ +---+
* vsync+--+
* frame_top+--------+
* frame_bottom+----------------------------+
*
* +-------------------+
* | v i d e o |
* +--+ +-----+ +-----+ +---+
* | | | |
* +--+ +--+
* vsync+-------------------------------+
* frame_top+-----+
* frame_bottom+-------------------------+
*
* [Horizontal timing]
* +--+ +-------------------+ +--+
* | | | v i d e o | | |
* +--+ +-----+ +-----+ +---+
* hsync+--+
* frame_left+--------+
* frame_right+----------------------------+
*
* +-------------------+
* | v i d e o |
* +--+ +-----+ +-----+ +---+
* | | | |
* +--+ +--+
* hsync+-------------------------------+
* frame_left+-----+
* frame_right+-------------------------+
*
* @v: the struct of aspeed_video
* @det: v4l2_bt_timings to be updated.
*/
static void aspeed_video_get_timings(struct aspeed_video *v,
struct v4l2_bt_timings *det)
{
u32 mds, sync, htotal, vtotal, vsync, hsync;
mds = aspeed_video_read(v, VE_MODE_DETECT_STATUS);
sync = aspeed_video_read(v, VE_SYNC_STATUS);
htotal = aspeed_video_read(v, VE_H_TOTAL_PIXELS);
vtotal = FIELD_GET(VE_MODE_DETECT_V_LINES, mds);
vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync);
hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync);
/*
* This is a workaround for polarity detection.
* Because ast-soc counts sync from sync's rising edge, the reg value
* of sync would be larger than video's active area if negative.
*/
if (vsync > det->height)
det->polarities &= ~V4L2_DV_VSYNC_POS_POL;
else
det->polarities |= V4L2_DV_VSYNC_POS_POL;
if (hsync > det->width)
det->polarities &= ~V4L2_DV_HSYNC_POS_POL;
else
det->polarities |= V4L2_DV_HSYNC_POS_POL;
if (det->polarities & V4L2_DV_VSYNC_POS_POL) {
det->vbackporch = v->frame_top - vsync;
det->vfrontporch = vtotal - v->frame_bottom;
det->vsync = vsync;
} else {
det->vbackporch = v->frame_top;
det->vfrontporch = vsync - v->frame_bottom;
det->vsync = vtotal - vsync;
}
if (det->polarities & V4L2_DV_HSYNC_POS_POL) {
det->hbackporch = v->frame_left - hsync;
det->hfrontporch = htotal - v->frame_right;
det->hsync = hsync;
} else {
det->hbackporch = v->frame_left;
det->hfrontporch = hsync - v->frame_right;
det->hsync = htotal - hsync;
}
}
#define res_check(v) test_and_clear_bit(VIDEO_MODE_DETECT_DONE, &(v)->flags)
static void aspeed_video_get_resolution(struct aspeed_video *video)
@ -810,11 +903,8 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
bool invalid_resolution = true;
int rc;
int tries = 0;
u32 mds;
u32 src_lr_edge;
u32 src_tb_edge;
u32 sync;
u32 htotal;
struct v4l2_bt_timings *det = &video->detected_timings;
det->width = MIN_WIDTH;
@ -858,24 +948,16 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
src_lr_edge = aspeed_video_read(video, VE_SRC_LR_EDGE_DET);
src_tb_edge = aspeed_video_read(video, VE_SRC_TB_EDGE_DET);
mds = aspeed_video_read(video, VE_MODE_DETECT_STATUS);
sync = aspeed_video_read(video, VE_SYNC_STATUS);
htotal = aspeed_video_read(video, VE_H_TOTAL_PIXELS);
video->frame_bottom = FIELD_GET(VE_SRC_TB_EDGE_DET_BOT, src_tb_edge);
video->frame_top = FIELD_GET(VE_SRC_TB_EDGE_DET_TOP, src_tb_edge);
det->vfrontporch = video->frame_top;
det->vbackporch = FIELD_GET(VE_MODE_DETECT_V_LINES, mds) -
video->frame_bottom;
det->vsync = FIELD_GET(VE_SYNC_STATUS_VSYNC, sync);
if (video->frame_top > video->frame_bottom)
continue;
video->frame_right = FIELD_GET(VE_SRC_LR_EDGE_DET_RT, src_lr_edge);
video->frame_left = FIELD_GET(VE_SRC_LR_EDGE_DET_LEFT, src_lr_edge);
det->hfrontporch = video->frame_left;
det->hbackporch = htotal - video->frame_right;
det->hsync = FIELD_GET(VE_SYNC_STATUS_HSYNC, sync);
if (video->frame_left > video->frame_right)
continue;
@ -891,6 +973,8 @@ static void aspeed_video_get_resolution(struct aspeed_video *video)
det->width = (video->frame_right - video->frame_left) + 1;
video->v4l2_input_status = 0;
aspeed_video_get_timings(video, det);
/*
* Enable mode-detect watchdog, resolution-change watchdog and
* automatic compression after frame capture.