drm/amdgpu: add amdgpu_bo_param
amdgpu_bo_create has too many parameters, and used in too many places. Collect them to one structure. Signed-off-by: Chunming Zhou <david1.zhou@amd.com> Reviewed-by: Huang Rui <ray.huang@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Reviewed-by: Junwei Zhang <Jerry.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -341,27 +341,25 @@ fail:
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return false;
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}
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static int amdgpu_bo_do_create(struct amdgpu_device *adev, unsigned long size,
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int byte_align, u32 domain,
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u64 flags, enum ttm_bo_type type,
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struct reservation_object *resv,
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static int amdgpu_bo_do_create(struct amdgpu_device *adev,
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struct amdgpu_bo_param *bp,
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struct amdgpu_bo **bo_ptr)
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{
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struct ttm_operation_ctx ctx = {
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.interruptible = (type != ttm_bo_type_kernel),
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.interruptible = (bp->type != ttm_bo_type_kernel),
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.no_wait_gpu = false,
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.resv = resv,
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.resv = bp->resv,
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.flags = TTM_OPT_FLAG_ALLOW_RES_EVICT
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};
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struct amdgpu_bo *bo;
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unsigned long page_align;
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unsigned long page_align, size = bp->size;
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size_t acc_size;
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int r;
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page_align = roundup(byte_align, PAGE_SIZE) >> PAGE_SHIFT;
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page_align = roundup(bp->byte_align, PAGE_SIZE) >> PAGE_SHIFT;
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size = ALIGN(size, PAGE_SIZE);
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if (!amdgpu_bo_validate_size(adev, size, domain))
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if (!amdgpu_bo_validate_size(adev, size, bp->domain))
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return -ENOMEM;
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*bo_ptr = NULL;
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@ -375,18 +373,18 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, unsigned long size,
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drm_gem_private_object_init(adev->ddev, &bo->gem_base, size);
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INIT_LIST_HEAD(&bo->shadow_list);
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INIT_LIST_HEAD(&bo->va);
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bo->preferred_domains = domain & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU |
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AMDGPU_GEM_DOMAIN_GDS |
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AMDGPU_GEM_DOMAIN_GWS |
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AMDGPU_GEM_DOMAIN_OA);
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bo->preferred_domains = bp->domain & (AMDGPU_GEM_DOMAIN_VRAM |
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AMDGPU_GEM_DOMAIN_GTT |
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AMDGPU_GEM_DOMAIN_CPU |
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AMDGPU_GEM_DOMAIN_GDS |
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AMDGPU_GEM_DOMAIN_GWS |
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AMDGPU_GEM_DOMAIN_OA);
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bo->allowed_domains = bo->preferred_domains;
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if (type != ttm_bo_type_kernel &&
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if (bp->type != ttm_bo_type_kernel &&
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bo->allowed_domains == AMDGPU_GEM_DOMAIN_VRAM)
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bo->allowed_domains |= AMDGPU_GEM_DOMAIN_GTT;
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bo->flags = flags;
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bo->flags = bp->flags;
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#ifdef CONFIG_X86_32
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/* XXX: Write-combined CPU mappings of GTT seem broken on 32-bit
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@ -417,11 +415,11 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, unsigned long size,
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#endif
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bo->tbo.bdev = &adev->mman.bdev;
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amdgpu_ttm_placement_from_domain(bo, domain);
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amdgpu_ttm_placement_from_domain(bo, bp->domain);
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r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, type,
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r = ttm_bo_init_reserved(&adev->mman.bdev, &bo->tbo, size, bp->type,
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&bo->placement, page_align, &ctx, acc_size,
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NULL, resv, &amdgpu_ttm_bo_destroy);
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NULL, bp->resv, &amdgpu_ttm_bo_destroy);
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if (unlikely(r != 0))
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return r;
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@ -433,10 +431,10 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, unsigned long size,
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else
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amdgpu_cs_report_moved_bytes(adev, ctx.bytes_moved, 0);
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if (type == ttm_bo_type_kernel)
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if (bp->type == ttm_bo_type_kernel)
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bo->tbo.priority = 1;
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if (flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
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if (bp->flags & AMDGPU_GEM_CREATE_VRAM_CLEARED &&
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bo->tbo.mem.placement & TTM_PL_FLAG_VRAM) {
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struct dma_fence *fence;
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@ -449,20 +447,20 @@ static int amdgpu_bo_do_create(struct amdgpu_device *adev, unsigned long size,
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bo->tbo.moving = dma_fence_get(fence);
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dma_fence_put(fence);
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}
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if (!resv)
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if (!bp->resv)
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amdgpu_bo_unreserve(bo);
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*bo_ptr = bo;
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trace_amdgpu_bo_create(bo);
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/* Treat CPU_ACCESS_REQUIRED only as a hint if given by UMD */
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if (type == ttm_bo_type_device)
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if (bp->type == ttm_bo_type_device)
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bo->flags &= ~AMDGPU_GEM_CREATE_CPU_ACCESS_REQUIRED;
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return 0;
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fail_unreserve:
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if (!resv)
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if (!bp->resv)
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ww_mutex_unlock(&bo->tbo.resv->lock);
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amdgpu_bo_unref(&bo);
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return r;
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@ -472,16 +470,21 @@ static int amdgpu_bo_create_shadow(struct amdgpu_device *adev,
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unsigned long size, int byte_align,
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struct amdgpu_bo *bo)
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{
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struct amdgpu_bo_param bp = {
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.size = size,
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.byte_align = byte_align,
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.domain = AMDGPU_GEM_DOMAIN_GTT,
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.flags = AMDGPU_GEM_CREATE_CPU_GTT_USWC |
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AMDGPU_GEM_CREATE_SHADOW,
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.type = ttm_bo_type_kernel,
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.resv = bo->tbo.resv
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};
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int r;
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if (bo->shadow)
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return 0;
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r = amdgpu_bo_do_create(adev, size, byte_align, AMDGPU_GEM_DOMAIN_GTT,
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AMDGPU_GEM_CREATE_CPU_GTT_USWC |
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AMDGPU_GEM_CREATE_SHADOW,
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ttm_bo_type_kernel,
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bo->tbo.resv, &bo->shadow);
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r = amdgpu_bo_do_create(adev, &bp, &bo->shadow);
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if (!r) {
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bo->shadow->parent = amdgpu_bo_ref(bo);
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mutex_lock(&adev->shadow_list_lock);
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@ -498,11 +501,17 @@ int amdgpu_bo_create(struct amdgpu_device *adev, unsigned long size,
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struct reservation_object *resv,
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struct amdgpu_bo **bo_ptr)
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{
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uint64_t parent_flags = flags & ~AMDGPU_GEM_CREATE_SHADOW;
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struct amdgpu_bo_param bp = {
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.size = size,
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.byte_align = byte_align,
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.domain = domain,
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.flags = flags & ~AMDGPU_GEM_CREATE_SHADOW,
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.type = type,
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.resv = resv
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};
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int r;
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r = amdgpu_bo_do_create(adev, size, byte_align, domain,
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parent_flags, type, resv, bo_ptr);
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r = amdgpu_bo_do_create(adev, &bp, bo_ptr);
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if (r)
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return r;
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@ -33,6 +33,15 @@
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#define AMDGPU_BO_INVALID_OFFSET LONG_MAX
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struct amdgpu_bo_param {
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unsigned long size;
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int byte_align;
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u32 domain;
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u64 flags;
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enum ttm_bo_type type;
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struct reservation_object *resv;
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};
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/* bo virtual addresses in a vm */
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struct amdgpu_bo_va_mapping {
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struct amdgpu_bo_va *bo_va;
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