drm/i915: enable platform support for 2M pages
For gen8+ platforms which support the 48b PPGTT, enable platform level support for 2M pages. Also enable for mock testing. Signed-off-by: Matthew Auld <matthew.auld@intel.com> Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com> Cc: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171006145041.21673-22-matthew.auld@intel.com Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Link: https://patchwork.freedesktop.org/patch/msgid/20171006221833.32439-21-chris@chris-wilson.co.uk
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@ -376,7 +376,8 @@ static const struct intel_device_info intel_haswell_gt3_info __initconst = {
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#define GEN8_FEATURES \
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G75_FEATURES, \
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BDW_COLORS, \
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GEN_DEFAULT_PAGE_SIZES, \
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.page_sizes = I915_GTT_PAGE_SIZE_4K | \
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I915_GTT_PAGE_SIZE_2M, \
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.has_logical_ring_contexts = 1, \
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.has_full_48bit_ppgtt = 1, \
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.has_64bit_reloc = 1, \
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@ -437,7 +438,8 @@ static const struct intel_device_info intel_cherryview_info __initconst = {
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#define GEN9_DEFAULT_PAGE_SIZES \
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.page_sizes = I915_GTT_PAGE_SIZE_4K | \
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I915_GTT_PAGE_SIZE_64K
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I915_GTT_PAGE_SIZE_64K | \
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I915_GTT_PAGE_SIZE_2M
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#define GEN9_FEATURES \
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GEN8_FEATURES, \
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@ -176,7 +176,8 @@ struct drm_i915_private *mock_gem_device(void)
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mkwrite_device_info(i915)->page_sizes =
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I915_GTT_PAGE_SIZE_4K |
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I915_GTT_PAGE_SIZE_64K;
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I915_GTT_PAGE_SIZE_64K |
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I915_GTT_PAGE_SIZE_2M;
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spin_lock_init(&i915->mm.object_stat_lock);
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mock_uncore_init(i915);
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