ASoC: txx9: Remove driver
CPU support for TX49xx is getting removed, so remove sound support for it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Link: https://lore.kernel.org/r/20210105140305.141401-11-tsbogend@alpha.franken.de Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Thomas Bogendoerfer
Mark Brown
parent
81a6320da7
commit
a8644292ea
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@ -71,7 +71,6 @@ source "sound/soc/stm/Kconfig"
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source "sound/soc/sunxi/Kconfig"
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source "sound/soc/tegra/Kconfig"
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source "sound/soc/ti/Kconfig"
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source "sound/soc/txx9/Kconfig"
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source "sound/soc/uniphier/Kconfig"
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source "sound/soc/ux500/Kconfig"
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source "sound/soc/xilinx/Kconfig"
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@ -54,7 +54,6 @@ obj-$(CONFIG_SND_SOC) += stm/
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obj-$(CONFIG_SND_SOC) += sunxi/
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obj-$(CONFIG_SND_SOC) += tegra/
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obj-$(CONFIG_SND_SOC) += ti/
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obj-$(CONFIG_SND_SOC) += txx9/
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obj-$(CONFIG_SND_SOC) += uniphier/
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obj-$(CONFIG_SND_SOC) += ux500/
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obj-$(CONFIG_SND_SOC) += xilinx/
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@ -1,30 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0-only
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##
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## TXx9 ACLC
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##
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config SND_SOC_TXX9ACLC
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tristate "SoC Audio for TXx9"
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depends on HAS_TXX9_ACLC && TXX9_DMAC
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help
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This option enables support for the AC Link Controllers in TXx9 SoC.
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config HAS_TXX9_ACLC
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bool
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config SND_SOC_TXX9ACLC_AC97
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tristate
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select AC97_BUS
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select SND_AC97_CODEC
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select SND_SOC_AC97_BUS
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##
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## Boards
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##
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config SND_SOC_TXX9ACLC_GENERIC
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tristate "Generic TXx9 ACLC sound machine"
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depends on SND_SOC_TXX9ACLC
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select SND_SOC_TXX9ACLC_AC97
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select SND_SOC_AC97_CODEC
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help
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This is a generic AC97 sound machine for use in TXx9 based systems.
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@ -1,12 +0,0 @@
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# SPDX-License-Identifier: GPL-2.0
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# Platform
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snd-soc-txx9aclc-objs := txx9aclc.o
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snd-soc-txx9aclc-ac97-objs := txx9aclc-ac97.o
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obj-$(CONFIG_SND_SOC_TXX9ACLC) += snd-soc-txx9aclc.o
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obj-$(CONFIG_SND_SOC_TXX9ACLC_AC97) += snd-soc-txx9aclc-ac97.o
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# Machine
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snd-soc-txx9aclc-generic-objs := txx9aclc-generic.o
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obj-$(CONFIG_SND_SOC_TXX9ACLC_GENERIC) += snd-soc-txx9aclc-generic.o
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@ -1,230 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* TXx9 ACLC AC97 driver
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*
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* Copyright (C) 2009 Atsushi Nemoto
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*
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* Based on RBTX49xx patch from CELF patch archive.
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* (C) Copyright TOSHIBA CORPORATION 2004-2006
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/gfp.h>
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#include <asm/mach-tx39xx/ioremap.h> /* for TXX9_DIRECTMAP_BASE */
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include "txx9aclc.h"
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#define AC97_DIR \
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(SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
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#define AC97_RATES \
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SNDRV_PCM_RATE_8000_48000
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#ifdef __BIG_ENDIAN
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#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_BE
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#else
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#define AC97_FMTS SNDRV_PCM_FMTBIT_S16_LE
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#endif
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static DECLARE_WAIT_QUEUE_HEAD(ac97_waitq);
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/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
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static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
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static int txx9aclc_regready(struct txx9aclc_plat_drvdata *drvdata)
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{
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return __raw_readl(drvdata->base + ACINTSTS) & ACINT_REGACCRDY;
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}
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/* AC97 controller reads codec register */
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static unsigned short txx9aclc_ac97_read(struct snd_ac97 *ac97,
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unsigned short reg)
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{
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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u32 dat;
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if (!(__raw_readl(base + ACINTSTS) & ACINT_CODECRDY(ac97->num)))
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return 0xffff;
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reg |= ac97->num << 7;
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dat = (reg << ACREGACC_REG_SHIFT) | ACREGACC_READ;
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__raw_writel(dat, base + ACREGACC);
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__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
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if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
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__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
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printk(KERN_ERR "ac97 read timeout (reg %#x)\n", reg);
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dat = 0xffff;
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goto done;
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}
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dat = __raw_readl(base + ACREGACC);
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if (((dat >> ACREGACC_REG_SHIFT) & 0xff) != reg) {
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printk(KERN_ERR "reg mismatch %x with %x\n",
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dat, reg);
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dat = 0xffff;
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goto done;
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}
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dat = (dat >> ACREGACC_DAT_SHIFT) & 0xffff;
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done:
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__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
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return dat;
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}
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/* AC97 controller writes to codec register */
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static void txx9aclc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
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unsigned short val)
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{
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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__raw_writel(((reg | (ac97->num << 7)) << ACREGACC_REG_SHIFT) |
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(val << ACREGACC_DAT_SHIFT),
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base + ACREGACC);
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__raw_writel(ACINT_REGACCRDY, base + ACINTEN);
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if (!wait_event_timeout(ac97_waitq, txx9aclc_regready(txx9aclc_drvdata), HZ)) {
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printk(KERN_ERR
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"ac97 write timeout (reg %#x)\n", reg);
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}
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__raw_writel(ACINT_REGACCRDY, base + ACINTDIS);
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}
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static void txx9aclc_ac97_cold_reset(struct snd_ac97 *ac97)
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{
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struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
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void __iomem *base = drvdata->base;
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u32 ready = ACINT_CODECRDY(ac97->num) | ACINT_REGACCRDY;
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__raw_writel(ACCTL_ENLINK, base + ACCTLDIS);
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udelay(1);
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__raw_writel(ACCTL_ENLINK, base + ACCTLEN);
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/* wait for primary codec ready status */
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__raw_writel(ready, base + ACINTEN);
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if (!wait_event_timeout(ac97_waitq,
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(__raw_readl(base + ACINTSTS) & ready) == ready,
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HZ)) {
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dev_err(&ac97->dev, "primary codec is not ready "
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"(status %#x)\n",
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__raw_readl(base + ACINTSTS));
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}
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__raw_writel(ACINT_REGACCRDY, base + ACINTSTS);
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__raw_writel(ready, base + ACINTDIS);
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}
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/* AC97 controller operations */
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static struct snd_ac97_bus_ops txx9aclc_ac97_ops = {
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.read = txx9aclc_ac97_read,
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.write = txx9aclc_ac97_write,
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.reset = txx9aclc_ac97_cold_reset,
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};
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static irqreturn_t txx9aclc_ac97_irq(int irq, void *dev_id)
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{
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struct txx9aclc_plat_drvdata *drvdata = dev_id;
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void __iomem *base = drvdata->base;
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__raw_writel(__raw_readl(base + ACINTMSTS), base + ACINTDIS);
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wake_up(&ac97_waitq);
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return IRQ_HANDLED;
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}
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static int txx9aclc_ac97_probe(struct snd_soc_dai *dai)
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{
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txx9aclc_drvdata = snd_soc_dai_get_drvdata(dai);
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return 0;
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}
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static int txx9aclc_ac97_remove(struct snd_soc_dai *dai)
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{
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struct txx9aclc_plat_drvdata *drvdata = snd_soc_dai_get_drvdata(dai);
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/* disable AC-link */
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__raw_writel(ACCTL_ENLINK, drvdata->base + ACCTLDIS);
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txx9aclc_drvdata = NULL;
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return 0;
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}
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static struct snd_soc_dai_driver txx9aclc_ac97_dai = {
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.probe = txx9aclc_ac97_probe,
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.remove = txx9aclc_ac97_remove,
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.playback = {
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.rates = AC97_RATES,
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.formats = AC97_FMTS,
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.channels_min = 2,
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.channels_max = 2,
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},
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.capture = {
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.rates = AC97_RATES,
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.formats = AC97_FMTS,
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.channels_min = 2,
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.channels_max = 2,
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},
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};
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static const struct snd_soc_component_driver txx9aclc_ac97_component = {
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.name = "txx9aclc-ac97",
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};
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static int txx9aclc_ac97_dev_probe(struct platform_device *pdev)
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{
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struct txx9aclc_plat_drvdata *drvdata;
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struct resource *r;
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int err;
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int irq;
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irq = platform_get_irq(pdev, 0);
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if (irq < 0)
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return irq;
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drvdata = devm_kzalloc(&pdev->dev, sizeof(*drvdata), GFP_KERNEL);
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if (!drvdata)
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return -ENOMEM;
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r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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drvdata->base = devm_ioremap_resource(&pdev->dev, r);
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if (IS_ERR(drvdata->base))
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return PTR_ERR(drvdata->base);
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platform_set_drvdata(pdev, drvdata);
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drvdata->physbase = r->start;
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if (sizeof(drvdata->physbase) > sizeof(r->start) &&
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r->start >= TXX9_DIRECTMAP_BASE &&
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r->start < TXX9_DIRECTMAP_BASE + 0x400000)
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drvdata->physbase |= 0xf00000000ull;
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err = devm_request_irq(&pdev->dev, irq, txx9aclc_ac97_irq,
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0, dev_name(&pdev->dev), drvdata);
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if (err < 0)
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return err;
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err = snd_soc_set_ac97_ops(&txx9aclc_ac97_ops);
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if (err < 0)
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return err;
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return devm_snd_soc_register_component(&pdev->dev, &txx9aclc_ac97_component,
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&txx9aclc_ac97_dai, 1);
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}
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static int txx9aclc_ac97_dev_remove(struct platform_device *pdev)
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{
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snd_soc_set_ac97_ops(NULL);
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return 0;
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}
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static struct platform_driver txx9aclc_ac97_driver = {
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.probe = txx9aclc_ac97_dev_probe,
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.remove = txx9aclc_ac97_dev_remove,
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.driver = {
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.name = "txx9aclc-ac97",
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},
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};
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module_platform_driver(txx9aclc_ac97_driver);
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MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
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MODULE_DESCRIPTION("TXx9 ACLC AC97 driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:txx9aclc-ac97");
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@ -1,88 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Generic TXx9 ACLC machine driver
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*
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* Copyright (C) 2009 Atsushi Nemoto
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*
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* Based on RBTX49xx patch from CELF patch archive.
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* (C) Copyright TOSHIBA CORPORATION 2004-2006
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*
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* This is a very generic AC97 sound machine driver for boards which
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* have (AC97) audio at ACLC (e.g. RBTX49XX boards).
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*/
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/soc.h>
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#include "txx9aclc.h"
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SND_SOC_DAILINK_DEFS(hifi,
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DAILINK_COMP_ARRAY(COMP_CPU("txx9aclc-ac97")),
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DAILINK_COMP_ARRAY(COMP_CODEC("ac97-codec", "ac97-hifi")),
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DAILINK_COMP_ARRAY(COMP_PLATFORM("txx9aclc-pcm-audio")));
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static struct snd_soc_dai_link txx9aclc_generic_dai = {
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.name = "AC97",
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.stream_name = "AC97 HiFi",
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SND_SOC_DAILINK_REG(hifi),
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};
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static struct snd_soc_card txx9aclc_generic_card = {
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.name = "Generic TXx9 ACLC Audio",
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.owner = THIS_MODULE,
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.dai_link = &txx9aclc_generic_dai,
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.num_links = 1,
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};
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static struct platform_device *soc_pdev;
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static int __init txx9aclc_generic_probe(struct platform_device *pdev)
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{
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int ret;
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soc_pdev = platform_device_alloc("soc-audio", -1);
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if (!soc_pdev)
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return -ENOMEM;
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platform_set_drvdata(soc_pdev, &txx9aclc_generic_card);
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ret = platform_device_add(soc_pdev);
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if (ret) {
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platform_device_put(soc_pdev);
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return ret;
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}
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return 0;
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}
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static int __exit txx9aclc_generic_remove(struct platform_device *pdev)
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{
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platform_device_unregister(soc_pdev);
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return 0;
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}
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static struct platform_driver txx9aclc_generic_driver = {
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.remove = __exit_p(txx9aclc_generic_remove),
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.driver = {
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.name = "txx9aclc-generic",
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},
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};
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static int __init txx9aclc_generic_init(void)
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{
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return platform_driver_probe(&txx9aclc_generic_driver,
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txx9aclc_generic_probe);
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}
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static void __exit txx9aclc_generic_exit(void)
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{
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platform_driver_unregister(&txx9aclc_generic_driver);
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}
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module_init(txx9aclc_generic_init);
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module_exit(txx9aclc_generic_exit);
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MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
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MODULE_DESCRIPTION("Generic TXx9 ACLC ALSA SoC audio driver");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS("platform:txx9aclc-generic");
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@ -1,422 +0,0 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Generic TXx9 ACLC platform driver
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*
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* Copyright (C) 2009 Atsushi Nemoto
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*
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* Based on RBTX49xx patch from CELF patch archive.
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* (C) Copyright TOSHIBA CORPORATION 2004-2006
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/platform_device.h>
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#include <linux/scatterlist.h>
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#include <linux/slab.h>
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#include <linux/dmaengine.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include "txx9aclc.h"
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#define DRV_NAME "txx9aclc"
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static struct txx9aclc_soc_device {
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struct txx9aclc_dmadata dmadata[2];
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} txx9aclc_soc_device;
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/* REVISIT: How to find txx9aclc_drvdata from snd_ac97? */
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static struct txx9aclc_plat_drvdata *txx9aclc_drvdata;
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static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
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struct txx9aclc_dmadata *dmadata);
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static const struct snd_pcm_hardware txx9aclc_pcm_hardware = {
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/*
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* REVISIT: SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID
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* needs more works for noncoherent MIPS.
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*/
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.info = SNDRV_PCM_INFO_INTERLEAVED |
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SNDRV_PCM_INFO_BATCH |
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SNDRV_PCM_INFO_PAUSE,
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.period_bytes_min = 1024,
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.period_bytes_max = 8 * 1024,
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.periods_min = 2,
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.periods_max = 4096,
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.buffer_bytes_max = 32 * 1024,
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};
|
||||
|
||||
static int txx9aclc_pcm_hw_params(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream,
|
||||
struct snd_pcm_hw_params *params)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct txx9aclc_dmadata *dmadata = runtime->private_data;
|
||||
|
||||
dev_dbg(component->dev,
|
||||
"runtime->dma_area = %#lx dma_addr = %#lx dma_bytes = %zd "
|
||||
"runtime->min_align %ld\n",
|
||||
(unsigned long)runtime->dma_area,
|
||||
(unsigned long)runtime->dma_addr, runtime->dma_bytes,
|
||||
runtime->min_align);
|
||||
dev_dbg(component->dev,
|
||||
"periods %d period_bytes %d stream %d\n",
|
||||
params_periods(params), params_period_bytes(params),
|
||||
substream->stream);
|
||||
|
||||
dmadata->substream = substream;
|
||||
dmadata->pos = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_prepare(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct snd_pcm_runtime *runtime = substream->runtime;
|
||||
struct txx9aclc_dmadata *dmadata = runtime->private_data;
|
||||
|
||||
dmadata->dma_addr = runtime->dma_addr;
|
||||
dmadata->buffer_bytes = snd_pcm_lib_buffer_bytes(substream);
|
||||
dmadata->period_bytes = snd_pcm_lib_period_bytes(substream);
|
||||
|
||||
if (dmadata->buffer_bytes == dmadata->period_bytes) {
|
||||
dmadata->frag_bytes = dmadata->period_bytes >> 1;
|
||||
dmadata->frags = 2;
|
||||
} else {
|
||||
dmadata->frag_bytes = dmadata->period_bytes;
|
||||
dmadata->frags = dmadata->buffer_bytes / dmadata->period_bytes;
|
||||
}
|
||||
dmadata->frag_count = 0;
|
||||
dmadata->pos = 0;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void txx9aclc_dma_complete(void *arg)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata = arg;
|
||||
unsigned long flags;
|
||||
|
||||
/* dma completion handler cannot submit new operations */
|
||||
spin_lock_irqsave(&dmadata->dma_lock, flags);
|
||||
if (dmadata->frag_count >= 0) {
|
||||
dmadata->dmacount--;
|
||||
if (!WARN_ON(dmadata->dmacount < 0))
|
||||
queue_work(system_highpri_wq, &dmadata->work);
|
||||
}
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
}
|
||||
|
||||
static struct dma_async_tx_descriptor *
|
||||
txx9aclc_dma_submit(struct txx9aclc_dmadata *dmadata, dma_addr_t buf_dma_addr)
|
||||
{
|
||||
struct dma_chan *chan = dmadata->dma_chan;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
struct scatterlist sg;
|
||||
|
||||
sg_init_table(&sg, 1);
|
||||
sg_set_page(&sg, pfn_to_page(PFN_DOWN(buf_dma_addr)),
|
||||
dmadata->frag_bytes, buf_dma_addr & (PAGE_SIZE - 1));
|
||||
sg_dma_address(&sg) = buf_dma_addr;
|
||||
desc = dmaengine_prep_slave_sg(chan, &sg, 1,
|
||||
dmadata->substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
|
||||
DMA_MEM_TO_DEV : DMA_DEV_TO_MEM,
|
||||
DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
|
||||
if (!desc) {
|
||||
dev_err(&chan->dev->device, "cannot prepare slave dma\n");
|
||||
return NULL;
|
||||
}
|
||||
desc->callback = txx9aclc_dma_complete;
|
||||
desc->callback_param = dmadata;
|
||||
dmaengine_submit(desc);
|
||||
return desc;
|
||||
}
|
||||
|
||||
#define NR_DMA_CHAIN 2
|
||||
|
||||
static void txx9aclc_dma_work(struct work_struct *work)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata =
|
||||
container_of(work, struct txx9aclc_dmadata, work);
|
||||
struct dma_chan *chan = dmadata->dma_chan;
|
||||
struct dma_async_tx_descriptor *desc;
|
||||
struct snd_pcm_substream *substream = dmadata->substream;
|
||||
u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
|
||||
ACCTL_AUDODMA : ACCTL_AUDIDMA;
|
||||
int i;
|
||||
unsigned long flags;
|
||||
|
||||
spin_lock_irqsave(&dmadata->dma_lock, flags);
|
||||
if (dmadata->frag_count < 0) {
|
||||
struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
|
||||
void __iomem *base = drvdata->base;
|
||||
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
dmaengine_terminate_all(chan);
|
||||
/* first time */
|
||||
for (i = 0; i < NR_DMA_CHAIN; i++) {
|
||||
desc = txx9aclc_dma_submit(dmadata,
|
||||
dmadata->dma_addr + i * dmadata->frag_bytes);
|
||||
if (!desc)
|
||||
return;
|
||||
}
|
||||
dmadata->dmacount = NR_DMA_CHAIN;
|
||||
dma_async_issue_pending(chan);
|
||||
spin_lock_irqsave(&dmadata->dma_lock, flags);
|
||||
__raw_writel(ctlbit, base + ACCTLEN);
|
||||
dmadata->frag_count = NR_DMA_CHAIN % dmadata->frags;
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
return;
|
||||
}
|
||||
if (WARN_ON(dmadata->dmacount >= NR_DMA_CHAIN)) {
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
return;
|
||||
}
|
||||
while (dmadata->dmacount < NR_DMA_CHAIN) {
|
||||
dmadata->dmacount++;
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
desc = txx9aclc_dma_submit(dmadata,
|
||||
dmadata->dma_addr +
|
||||
dmadata->frag_count * dmadata->frag_bytes);
|
||||
if (!desc)
|
||||
return;
|
||||
dma_async_issue_pending(chan);
|
||||
|
||||
spin_lock_irqsave(&dmadata->dma_lock, flags);
|
||||
dmadata->frag_count++;
|
||||
dmadata->frag_count %= dmadata->frags;
|
||||
dmadata->pos += dmadata->frag_bytes;
|
||||
dmadata->pos %= dmadata->buffer_bytes;
|
||||
if ((dmadata->frag_count * dmadata->frag_bytes) %
|
||||
dmadata->period_bytes == 0)
|
||||
snd_pcm_period_elapsed(substream);
|
||||
}
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_trigger(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream, int cmd)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
|
||||
struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
|
||||
void __iomem *base = drvdata->base;
|
||||
unsigned long flags;
|
||||
int ret = 0;
|
||||
u32 ctlbit = substream->stream == SNDRV_PCM_STREAM_PLAYBACK ?
|
||||
ACCTL_AUDODMA : ACCTL_AUDIDMA;
|
||||
|
||||
spin_lock_irqsave(&dmadata->dma_lock, flags);
|
||||
switch (cmd) {
|
||||
case SNDRV_PCM_TRIGGER_START:
|
||||
dmadata->frag_count = -1;
|
||||
queue_work(system_highpri_wq, &dmadata->work);
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_STOP:
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
||||
case SNDRV_PCM_TRIGGER_SUSPEND:
|
||||
__raw_writel(ctlbit, base + ACCTLDIS);
|
||||
break;
|
||||
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
||||
case SNDRV_PCM_TRIGGER_RESUME:
|
||||
__raw_writel(ctlbit, base + ACCTLEN);
|
||||
break;
|
||||
default:
|
||||
ret = -EINVAL;
|
||||
}
|
||||
spin_unlock_irqrestore(&dmadata->dma_lock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static snd_pcm_uframes_t
|
||||
txx9aclc_pcm_pointer(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
|
||||
|
||||
return bytes_to_frames(substream->runtime, dmadata->pos);
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_open(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct txx9aclc_soc_device *dev = &txx9aclc_soc_device;
|
||||
struct txx9aclc_dmadata *dmadata = &dev->dmadata[substream->stream];
|
||||
int ret;
|
||||
|
||||
ret = snd_soc_set_runtime_hwparams(substream, &txx9aclc_pcm_hardware);
|
||||
if (ret)
|
||||
return ret;
|
||||
/* ensure that buffer size is a multiple of period size */
|
||||
ret = snd_pcm_hw_constraint_integer(substream->runtime,
|
||||
SNDRV_PCM_HW_PARAM_PERIODS);
|
||||
if (ret < 0)
|
||||
return ret;
|
||||
substream->runtime->private_data = dmadata;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_close(struct snd_soc_component *component,
|
||||
struct snd_pcm_substream *substream)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata = substream->runtime->private_data;
|
||||
struct dma_chan *chan = dmadata->dma_chan;
|
||||
|
||||
dmadata->frag_count = -1;
|
||||
dmaengine_terminate_all(chan);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_new(struct snd_soc_component *component,
|
||||
struct snd_soc_pcm_runtime *rtd)
|
||||
{
|
||||
struct snd_card *card = rtd->card->snd_card;
|
||||
struct snd_soc_dai *dai = asoc_rtd_to_cpu(rtd, 0);
|
||||
struct snd_pcm *pcm = rtd->pcm;
|
||||
struct platform_device *pdev = to_platform_device(component->dev);
|
||||
struct txx9aclc_soc_device *dev;
|
||||
struct resource *r;
|
||||
int i;
|
||||
int ret;
|
||||
|
||||
/* at this point onwards the AC97 component has probed and this will be valid */
|
||||
dev = snd_soc_dai_get_drvdata(dai);
|
||||
|
||||
dev->dmadata[0].stream = SNDRV_PCM_STREAM_PLAYBACK;
|
||||
dev->dmadata[1].stream = SNDRV_PCM_STREAM_CAPTURE;
|
||||
for (i = 0; i < 2; i++) {
|
||||
r = platform_get_resource(pdev, IORESOURCE_DMA, i);
|
||||
if (!r) {
|
||||
ret = -EBUSY;
|
||||
goto exit;
|
||||
}
|
||||
dev->dmadata[i].dma_res = r;
|
||||
ret = txx9aclc_dma_init(dev, &dev->dmadata[i]);
|
||||
if (ret)
|
||||
goto exit;
|
||||
}
|
||||
|
||||
snd_pcm_set_managed_buffer_all(pcm, SNDRV_DMA_TYPE_DEV,
|
||||
card->dev, 64 * 1024, 4 * 1024 * 1024);
|
||||
return 0;
|
||||
|
||||
exit:
|
||||
for (i = 0; i < 2; i++) {
|
||||
if (dev->dmadata[i].dma_chan)
|
||||
dma_release_channel(dev->dmadata[i].dma_chan);
|
||||
dev->dmadata[i].dma_chan = NULL;
|
||||
}
|
||||
return ret;
|
||||
}
|
||||
|
||||
static bool filter(struct dma_chan *chan, void *param)
|
||||
{
|
||||
struct txx9aclc_dmadata *dmadata = param;
|
||||
char *devname;
|
||||
bool found = false;
|
||||
|
||||
devname = kasprintf(GFP_KERNEL, "%s.%d", dmadata->dma_res->name,
|
||||
(int)dmadata->dma_res->start);
|
||||
if (strcmp(dev_name(chan->device->dev), devname) == 0) {
|
||||
chan->private = &dmadata->dma_slave;
|
||||
found = true;
|
||||
}
|
||||
kfree(devname);
|
||||
return found;
|
||||
}
|
||||
|
||||
static int txx9aclc_dma_init(struct txx9aclc_soc_device *dev,
|
||||
struct txx9aclc_dmadata *dmadata)
|
||||
{
|
||||
struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
|
||||
struct txx9dmac_slave *ds = &dmadata->dma_slave;
|
||||
dma_cap_mask_t mask;
|
||||
|
||||
spin_lock_init(&dmadata->dma_lock);
|
||||
|
||||
ds->reg_width = sizeof(u32);
|
||||
if (dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK) {
|
||||
ds->tx_reg = drvdata->physbase + ACAUDODAT;
|
||||
ds->rx_reg = 0;
|
||||
} else {
|
||||
ds->tx_reg = 0;
|
||||
ds->rx_reg = drvdata->physbase + ACAUDIDAT;
|
||||
}
|
||||
|
||||
/* Try to grab a DMA channel */
|
||||
dma_cap_zero(mask);
|
||||
dma_cap_set(DMA_SLAVE, mask);
|
||||
dmadata->dma_chan = dma_request_channel(mask, filter, dmadata);
|
||||
if (!dmadata->dma_chan) {
|
||||
printk(KERN_ERR
|
||||
"DMA channel for %s is not available\n",
|
||||
dmadata->stream == SNDRV_PCM_STREAM_PLAYBACK ?
|
||||
"playback" : "capture");
|
||||
return -EBUSY;
|
||||
}
|
||||
INIT_WORK(&dmadata->work, txx9aclc_dma_work);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int txx9aclc_pcm_probe(struct snd_soc_component *component)
|
||||
{
|
||||
snd_soc_component_set_drvdata(component, &txx9aclc_soc_device);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void txx9aclc_pcm_remove(struct snd_soc_component *component)
|
||||
{
|
||||
struct txx9aclc_soc_device *dev = snd_soc_component_get_drvdata(component);
|
||||
struct txx9aclc_plat_drvdata *drvdata = txx9aclc_drvdata;
|
||||
void __iomem *base = drvdata->base;
|
||||
int i;
|
||||
|
||||
/* disable all FIFO DMAs */
|
||||
__raw_writel(ACCTL_AUDODMA | ACCTL_AUDIDMA, base + ACCTLDIS);
|
||||
/* dummy R/W to clear pending DMAREQ if any */
|
||||
__raw_writel(__raw_readl(base + ACAUDIDAT), base + ACAUDODAT);
|
||||
|
||||
for (i = 0; i < 2; i++) {
|
||||
struct txx9aclc_dmadata *dmadata = &dev->dmadata[i];
|
||||
struct dma_chan *chan = dmadata->dma_chan;
|
||||
|
||||
if (chan) {
|
||||
dmadata->frag_count = -1;
|
||||
dmaengine_terminate_all(chan);
|
||||
dma_release_channel(chan);
|
||||
}
|
||||
dev->dmadata[i].dma_chan = NULL;
|
||||
}
|
||||
}
|
||||
|
||||
static const struct snd_soc_component_driver txx9aclc_soc_component = {
|
||||
.name = DRV_NAME,
|
||||
.probe = txx9aclc_pcm_probe,
|
||||
.remove = txx9aclc_pcm_remove,
|
||||
.open = txx9aclc_pcm_open,
|
||||
.close = txx9aclc_pcm_close,
|
||||
.hw_params = txx9aclc_pcm_hw_params,
|
||||
.prepare = txx9aclc_pcm_prepare,
|
||||
.trigger = txx9aclc_pcm_trigger,
|
||||
.pointer = txx9aclc_pcm_pointer,
|
||||
.pcm_construct = txx9aclc_pcm_new,
|
||||
};
|
||||
|
||||
static int txx9aclc_soc_platform_probe(struct platform_device *pdev)
|
||||
{
|
||||
return devm_snd_soc_register_component(&pdev->dev,
|
||||
&txx9aclc_soc_component, NULL, 0);
|
||||
}
|
||||
|
||||
static struct platform_driver txx9aclc_pcm_driver = {
|
||||
.driver = {
|
||||
.name = "txx9aclc-pcm-audio",
|
||||
},
|
||||
|
||||
.probe = txx9aclc_soc_platform_probe,
|
||||
};
|
||||
|
||||
module_platform_driver(txx9aclc_pcm_driver);
|
||||
|
||||
MODULE_AUTHOR("Atsushi Nemoto <anemo@mba.ocn.ne.jp>");
|
||||
MODULE_DESCRIPTION("TXx9 ACLC Audio DMA driver");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
|
@ -1,71 +0,0 @@
|
|||
/* SPDX-License-Identifier: GPL-2.0-only */
|
||||
/*
|
||||
* TXx9 SoC AC Link Controller
|
||||
*/
|
||||
|
||||
#ifndef __TXX9ACLC_H
|
||||
#define __TXX9ACLC_H
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
#include <asm/txx9/dmac.h>
|
||||
|
||||
#define ACCTLEN 0x00 /* control enable */
|
||||
#define ACCTLDIS 0x04 /* control disable */
|
||||
#define ACCTL_ENLINK 0x00000001 /* enable/disable AC-link */
|
||||
#define ACCTL_AUDODMA 0x00000100 /* AUDODMA enable/disable */
|
||||
#define ACCTL_AUDIDMA 0x00001000 /* AUDIDMA enable/disable */
|
||||
#define ACCTL_AUDOEHLT 0x00010000 /* AUDO error halt
|
||||
enable/disable */
|
||||
#define ACCTL_AUDIEHLT 0x00100000 /* AUDI error halt
|
||||
enable/disable */
|
||||
#define ACREGACC 0x08 /* codec register access */
|
||||
#define ACREGACC_DAT_SHIFT 0 /* data field */
|
||||
#define ACREGACC_REG_SHIFT 16 /* address field */
|
||||
#define ACREGACC_CODECID_SHIFT 24 /* CODEC ID field */
|
||||
#define ACREGACC_READ 0x80000000 /* CODEC read */
|
||||
#define ACREGACC_WRITE 0x00000000 /* CODEC write */
|
||||
#define ACINTSTS 0x10 /* interrupt status */
|
||||
#define ACINTMSTS 0x14 /* interrupt masked status */
|
||||
#define ACINTEN 0x18 /* interrupt enable */
|
||||
#define ACINTDIS 0x1c /* interrupt disable */
|
||||
#define ACINT_CODECRDY(n) (0x00000001 << (n)) /* CODECn ready */
|
||||
#define ACINT_REGACCRDY 0x00000010 /* ACREGACC ready */
|
||||
#define ACINT_AUDOERR 0x00000100 /* AUDO underrun error */
|
||||
#define ACINT_AUDIERR 0x00001000 /* AUDI overrun error */
|
||||
#define ACDMASTS 0x80 /* DMA request status */
|
||||
#define ACDMA_AUDO 0x00000001 /* AUDODMA pending */
|
||||
#define ACDMA_AUDI 0x00000010 /* AUDIDMA pending */
|
||||
#define ACAUDODAT 0xa0 /* audio out data */
|
||||
#define ACAUDIDAT 0xb0 /* audio in data */
|
||||
#define ACREVID 0xfc /* revision ID */
|
||||
|
||||
struct txx9aclc_dmadata {
|
||||
struct resource *dma_res;
|
||||
struct txx9dmac_slave dma_slave;
|
||||
struct dma_chan *dma_chan;
|
||||
struct work_struct work;
|
||||
spinlock_t dma_lock;
|
||||
int stream; /* SNDRV_PCM_STREAM_PLAYBACK or SNDRV_PCM_STREAM_CAPTURE */
|
||||
struct snd_pcm_substream *substream;
|
||||
unsigned long pos;
|
||||
dma_addr_t dma_addr;
|
||||
unsigned long buffer_bytes;
|
||||
unsigned long period_bytes;
|
||||
unsigned long frag_bytes;
|
||||
int frags;
|
||||
int frag_count;
|
||||
int dmacount;
|
||||
};
|
||||
|
||||
struct txx9aclc_plat_drvdata {
|
||||
void __iomem *base;
|
||||
u64 physbase;
|
||||
};
|
||||
|
||||
static inline struct txx9aclc_plat_drvdata *txx9aclc_get_plat_drvdata(
|
||||
struct snd_soc_dai *dai)
|
||||
{
|
||||
return dev_get_drvdata(dai->dev);
|
||||
}
|
||||
|
||||
#endif /* __TXX9ACLC_H */
|
||||
Loading…
Reference in New Issue