ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes

This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.

This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e47 ("spi: orion: Fix clock
resource by adding an optional bus clock")'.

Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
Gregory CLEMENT 2018-02-13 17:32:10 +01:00
parent 7928b2cbe5
commit a7cbf0b2d9
1 changed files with 6 additions and 2 deletions

View File

@ -257,7 +257,9 @@
reg = <0x700600 0x50>;
#address-cells = <0x1>;
#size-cells = <0x0>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "core", "axi";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};
@ -266,7 +268,9 @@
reg = <0x700680 0x50>;
#address-cells = <1>;
#size-cells = <0>;
clocks = <&CP110_LABEL(clk) 1 21>;
clock-names = "core", "axi";
clocks = <&CP110_LABEL(clk) 1 21>,
<&CP110_LABEL(clk) 1 17>;
status = "disabled";
};