ARM64: dts: marvell: armada-cp110: Add registers clock for SPI nodes
This extra clock is needed to access the registers of the SPI controller
used on Armada 7K/8K SoCs.
This follows the changes already made in the binding documentation (as
well as in the driver) in:
'commit 92ae112e47
("spi: orion: Fix clock
resource by adding an optional bus clock")'.
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
This commit is contained in:
parent
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commit
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@ -257,7 +257,9 @@
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reg = <0x700600 0x50>;
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#address-cells = <0x1>;
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#size-cells = <0x0>;
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clocks = <&CP110_LABEL(clk) 1 21>;
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clock-names = "core", "axi";
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clocks = <&CP110_LABEL(clk) 1 21>,
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<&CP110_LABEL(clk) 1 17>;
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status = "disabled";
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};
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@ -266,7 +268,9 @@
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reg = <0x700680 0x50>;
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#address-cells = <1>;
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#size-cells = <0>;
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clocks = <&CP110_LABEL(clk) 1 21>;
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clock-names = "core", "axi";
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clocks = <&CP110_LABEL(clk) 1 21>,
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<&CP110_LABEL(clk) 1 17>;
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status = "disabled";
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};
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