parisc: Add code generator for Qemu/SeaBIOS machine info
Qemu now supports emulating PA-RISC machines. For that a forked version of SeaBIOS available at https://github.com/hdeller/seabios-hppa is used which requires some information about the emulated machine. This patch adds code to generate a header file with the necessary information for SeaBIOS. The information is extracted from the firmware the current kernel is running on. Tested on a B160L workstation. Signed-off-by: Helge Deller <deller@gmx.de>
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@ -895,6 +895,171 @@ void __init init_parisc_bus(void)
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get_device(&root);
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}
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static __init void qemu_header(void)
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{
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int num;
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unsigned long *p;
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pr_info("--- cut here ---\n");
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pr_info("/* AUTO-GENERATED HEADER FILE FOR SEABIOS FIRMWARE */\n");
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pr_cont("/* generated with Linux kernel */\n");
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pr_cont("/* search for PARISC_QEMU_MACHINE_HEADER in Linux */\n\n");
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pr_info("#define PARISC_MODEL \"%s\"\n\n",
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boot_cpu_data.pdc.sys_model_name);
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pr_info("#define PARISC_PDC_MODEL 0x%lx, 0x%lx, 0x%lx, "
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"0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx, 0x%lx\n\n",
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#define p ((unsigned long *)&boot_cpu_data.pdc.model)
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p[0], p[1], p[2], p[3], p[4], p[5], p[6], p[7], p[8]);
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#undef p
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pr_info("#define PARISC_PDC_VERSION 0x%04lx\n\n",
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boot_cpu_data.pdc.versions);
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pr_info("#define PARISC_PDC_CPUID 0x%04lx\n\n",
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boot_cpu_data.pdc.cpuid);
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pr_info("#define PARISC_PDC_CAPABILITIES 0x%04lx\n\n",
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boot_cpu_data.pdc.capabilities);
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pr_info("#define PARISC_PDC_ENTRY_ORG 0x%04lx\n\n",
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#ifdef CONFIG_64BIT
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(unsigned long)(PAGE0->mem_pdc_hi) << 32 |
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#endif
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(unsigned long)PAGE0->mem_pdc);
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pr_info("#define PARISC_PDC_CACHE_INFO");
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p = (unsigned long *) &cache_info;
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for (num = 0; num < sizeof(cache_info); num += sizeof(unsigned long)) {
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if (((num % 5) == 0)) {
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pr_cont(" \\\n");
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pr_info("\t");
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}
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pr_cont("%s0x%04lx",
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num?", ":"", *p++);
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}
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pr_cont("\n\n");
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}
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static __init int qemu_print_hpa(struct device *lin_dev, void *data)
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{
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struct parisc_device *dev = to_parisc_device(lin_dev);
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unsigned long hpa = dev->hpa.start;
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pr_cont("\t{\t.hpa = 0x%08lx,\\\n", hpa);
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pr_cont("\t\t.iodc = &iodc_data_hpa_%08lx,\\\n", hpa);
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pr_cont("\t\t.mod_info = &mod_info_hpa_%08lx,\\\n", hpa);
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pr_cont("\t\t.mod_path = &mod_path_hpa_%08lx,\\\n", hpa);
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pr_cont("\t\t.num_addr = HPA_%08lx_num_addr,\\\n", hpa);
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pr_cont("\t\t.add_addr = { HPA_%08lx_add_addr } },\\\n", hpa);
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return 0;
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}
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static __init void qemu_footer(void)
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{
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pr_info("\n\n#define PARISC_DEVICE_LIST \\\n");
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for_each_padev(qemu_print_hpa, NULL);
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pr_cont("\t{ 0, }\n");
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pr_info("--- cut here ---\n");
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}
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/* print iodc data of the various hpa modules for qemu inclusion */
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static __init int qemu_print_iodc_data(struct device *lin_dev, void *data)
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{
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struct parisc_device *dev = to_parisc_device(lin_dev);
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unsigned long count;
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unsigned long hpa = dev->hpa.start;
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int status;
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struct pdc_iodc iodc_data;
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int mod_index;
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struct pdc_system_map_mod_info pdc_mod_info;
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struct pdc_module_path mod_path;
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status = pdc_iodc_read(&count, hpa, 0,
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&iodc_data, sizeof(iodc_data));
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if (status != PDC_OK) {
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pr_info("No IODC data for hpa 0x%08lx\n", hpa);
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return 0;
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}
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pr_info("\n");
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pr_info("#define HPA_%08lx_DESCRIPTION \"%s\"\n",
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hpa, parisc_hardware_description(&dev->id));
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mod_index = 0;
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do {
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status = pdc_system_map_find_mods(&pdc_mod_info,
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&mod_path, mod_index++);
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} while (status == PDC_OK && pdc_mod_info.mod_addr != hpa);
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pr_info("static struct pdc_system_map_mod_info"
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" mod_info_hpa_%08lx = {\n", hpa);
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#define DO(member) \
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pr_cont("\t." #member " = 0x%x,\n", \
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(unsigned int)pdc_mod_info.member)
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DO(mod_addr);
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DO(mod_pgs);
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DO(add_addrs);
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pr_cont("};\n");
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#undef DO
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pr_info("static struct pdc_module_path "
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"mod_path_hpa_%08lx = {\n", hpa);
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pr_cont("\t.path = { ");
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pr_cont(".flags = 0x%x, ", mod_path.path.flags);
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pr_cont(".bc = { 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x }, ",
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(unsigned char)mod_path.path.bc[0],
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(unsigned char)mod_path.path.bc[1],
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(unsigned char)mod_path.path.bc[2],
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(unsigned char)mod_path.path.bc[3],
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(unsigned char)mod_path.path.bc[4],
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(unsigned char)mod_path.path.bc[5]);
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pr_cont(".mod = 0x%x ", mod_path.path.mod);
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pr_cont(" },\n");
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pr_cont("\t.layers = { 0x%x, 0x%x, 0x%x, 0x%x, 0x%x, 0x%x }\n",
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mod_path.layers[0], mod_path.layers[1], mod_path.layers[2],
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mod_path.layers[3], mod_path.layers[4], mod_path.layers[5]);
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pr_cont("};\n");
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pr_info("static struct pdc_iodc iodc_data_hpa_%08lx = {\n", hpa);
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#define DO(member) \
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pr_cont("\t." #member " = 0x%04lx,\n", \
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(unsigned long)iodc_data.member)
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DO(hversion_model);
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DO(hversion);
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DO(spa);
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DO(type);
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DO(sversion_rev);
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DO(sversion_model);
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DO(sversion_opt);
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DO(rev);
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DO(dep);
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DO(features);
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DO(checksum);
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DO(length);
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#undef DO
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pr_cont("\t/* pad: 0x%04x, 0x%04x */\n",
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iodc_data.pad[0], iodc_data.pad[1]);
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pr_cont("};\n");
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pr_info("#define HPA_%08lx_num_addr %d\n", hpa, dev->num_addrs);
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pr_info("#define HPA_%08lx_add_addr ", hpa);
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count = 0;
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if (dev->num_addrs == 0)
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pr_cont("0");
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while (count < dev->num_addrs) {
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pr_cont("0x%08lx, ", dev->addr[count]);
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count++;
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}
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pr_cont("\n\n");
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return 0;
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}
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static int print_one_device(struct device * dev, void * data)
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{
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@ -911,4 +1076,10 @@ static int print_one_device(struct device * dev, void * data)
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void __init print_parisc_devices(void)
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{
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for_each_padev(print_one_device, NULL);
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#define PARISC_QEMU_MACHINE_HEADER 0
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if (PARISC_QEMU_MACHINE_HEADER) {
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qemu_header();
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for_each_padev(qemu_print_iodc_data, NULL);
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qemu_footer();
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}
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}
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