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UniPhier ARM SoC DT updates for v4.14 

- complete migrating to SPDX License Identifier
 - remove support for old SoC
 - add nodes for NAND, Audio pinctrl
 - replace /include/ with #include
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Merge tag 'uniphier-dt-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier into next/dt

Pull "UniPhier ARM SoC DT updates for v4.14" from Masahiro Yamada:

- complete migrating to SPDX License Identifier
- remove support for old SoC
- add nodes for NAND, Audio pinctrl
- replace /include/ with #include

* tag 'uniphier-dt-v4.14' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-uniphier:
  ARM: dts: uniphier: add Denali NAND controller node
  ARM: dts: uniphier use #include instead of /include/
  ARM: dts: uniphier: remove sLD3 SoC support
  ARM: dts: uniphier: add audio out pin-mux node
  ARM: dts: uniphier: use SPDX-License-Identifier (2nd)
This commit is contained in:
Arnd Bergmann 2017-08-16 23:29:02 +02:00
parent 146d8cd929 69f9cdc633
commit a74c7494c0
18 changed files with 100 additions and 432 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -974,7 +974,6 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-pro4-sanji.dtb \
uniphier-pxs2-gentil.dtb \
uniphier-pxs2-vodka.dtb \
uniphier-sld3-ref.dtb \
uniphier-sld8-ref.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += \
versatile-ab.dtb \

10
arch/arm/boot/dts/uniphier-ld4-ref.dts
View File

@ -8,9 +8,9 @@
*/
/dts-v1/;
/include/ "uniphier-ld4.dtsi"
/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
#include "uniphier-ld4.dtsi"
#include "uniphier-ref-daughter.dtsi"
#include "uniphier-support-card.dtsi"
/ {
model = "UniPhier LD4 Reference Board";
@ -64,3 +64,7 @@
&usb1 {
status = "okay";
};
&nand {
status = "okay";
};

13
arch/arm/boot/dts/uniphier-ld4.dtsi
View File

@ -285,7 +285,18 @@
#reset-cells = <1>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
clocks = <&sys_clk 2>;
};
};
};
/include/ "uniphier-pinctrl.dtsi"
#include "uniphier-pinctrl.dtsi"

10
arch/arm/boot/dts/uniphier-ld6b-ref.dts
View File

@ -8,9 +8,9 @@
*/
/dts-v1/;
/include/ "uniphier-ld6b.dtsi"
/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
#include "uniphier-ld6b.dtsi"
#include "uniphier-ref-daughter.dtsi"
#include "uniphier-support-card.dtsi"
/ {
model = "UniPhier LD6b Reference Board";
@ -58,3 +58,7 @@
&i2c0 {
status = "okay";
};
&nand {
status = "okay";
};

2
arch/arm/boot/dts/uniphier-ld6b.dtsi
View File

@ -12,7 +12,7 @@
* The D-chip (digital chip) is the same as the PXs2 die.
* Reuse the PXs2 device tree with some properties overridden.
*/
/include/ "uniphier-pxs2.dtsi"
#include "uniphier-pxs2.dtsi"
/ {
compatible = "socionext,uniphier-ld6b";

43
arch/arm/boot/dts/uniphier-pinctrl.dtsi
View File

@ -4,46 +4,15 @@
* Copyright (C) 2015-2017 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
&pinctrl {
pinctrl_aout: aout_grp {
groups = "aout";
function = "aout";
};
pinctrl_emmc: emmc_grp {
groups = "emmc", "emmc_dat8";
function = "emmc";

2
arch/arm/boot/dts/uniphier-pro4-ace.dts
View File

@ -8,7 +8,7 @@
*/
/dts-v1/;
/include/ "uniphier-pro4.dtsi"
#include "uniphier-pro4.dtsi"
/ {
model = "UniPhier Pro4 Ace Board";

10
arch/arm/boot/dts/uniphier-pro4-ref.dts
View File

@ -8,9 +8,9 @@
*/
/dts-v1/;
/include/ "uniphier-pro4.dtsi"
/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
#include "uniphier-pro4.dtsi"
#include "uniphier-ref-daughter.dtsi"
#include "uniphier-support-card.dtsi"
/ {
model = "UniPhier Pro4 Reference Board";
@ -66,3 +66,7 @@
&usb3 {
status = "okay";
};
&nand {
status = "okay";
};

2
arch/arm/boot/dts/uniphier-pro4-sanji.dts
View File

@ -8,7 +8,7 @@
*/
/dts-v1/;
/include/ "uniphier-pro4.dtsi"
#include "uniphier-pro4.dtsi"
/ {
model = "UniPhier Pro4 Sanji Board";

13
arch/arm/boot/dts/uniphier-pro4.dtsi
View File

@ -305,7 +305,18 @@
#reset-cells = <1>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand>;
clocks = <&sys_clk 2>;
};
};
};
/include/ "uniphier-pinctrl.dtsi"
#include "uniphier-pinctrl.dtsi"

51
arch/arm/boot/dts/uniphier-pro5.dtsi
View File

@ -4,43 +4,7 @@
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* This file is dual-licensed: you can use it either under the terms
* of the GPL or the X11 license, at your option. Note that this dual
* licensing only applies to this file, and not this project as a
* whole.
*
* a) This file is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation; either version 2 of the
* License, or (at your option) any later version.
*
* This file is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* Or, alternatively,
*
* b) Permission is hereby granted, free of charge, to any person
* obtaining a copy of this software and associated documentation
* files (the "Software"), to deal in the Software without
* restriction, including without limitation the rights to use,
* copy, modify, merge, publish, distribute, sublicense, and/or
* sell copies of the Software, and to permit persons to whom the
* Software is furnished to do so, subject to the following
* conditions:
*
* The above copyright notice and this permission notice shall be
* included in all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
* OTHER DEALINGS IN THE SOFTWARE.
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/ {
@ -404,7 +368,18 @@
#reset-cells = <1>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
clocks = <&sys_clk 2>;
};
};
};
/include/ "uniphier-pinctrl.dtsi"
#include "uniphier-pinctrl.dtsi"

2
arch/arm/boot/dts/uniphier-pxs2-gentil.dts
View File

@ -8,7 +8,7 @@
*/
/dts-v1/;
/include/ "uniphier-pxs2.dtsi"
#include "uniphier-pxs2.dtsi"
/ {
model = "UniPhier PXs2 Gentil Board";

2
arch/arm/boot/dts/uniphier-pxs2-vodka.dts
View File

@ -8,7 +8,7 @@
*/
/dts-v1/;
/include/ "uniphier-pxs2.dtsi"
#include "uniphier-pxs2.dtsi"
/ {
model = "UniPhier PXs2 Vodka Board";

13
arch/arm/boot/dts/uniphier-pxs2.dtsi
View File

@ -352,7 +352,18 @@
#reset-cells = <1>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5b";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
clocks = <&sys_clk 2>;
};
};
};
/include/ "uniphier-pinctrl.dtsi"
#include "uniphier-pinctrl.dtsi"

75
arch/arm/boot/dts/uniphier-sld3-ref.dts
View File

@ -1,75 +0,0 @@
/*
* Device Tree Source for UniPhier sLD3 Reference Board
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/dts-v1/;
/include/ "uniphier-sld3.dtsi"
/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
/ {
model = "UniPhier sLD3 Reference Board";
compatible = "socionext,uniphier-sld3-ref", "socionext,uniphier-sld3";
chosen {
stdout-path = "serial0:115200n8";
};
aliases {
serial0 = &serial0;
serial1 = &serial1;
serial2 = &serial2;
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &i2c2;
i2c3 = &i2c3;
i2c4 = &i2c4;
};
memory@8000000 {
device_type = "memory";
reg = <0x80000000 0x20000000
0xc0000000 0x20000000>;
};
};
&ethsc {
interrupts = <0 49 4>;
};
&serial0 {
status = "okay";
};
&serial1 {
status = "okay";
};
&serial2 {
status = "okay";
};
&i2c0 {
status = "okay";
};
&usb0 {
status = "okay";
};
&usb1 {
status = "okay";
};
&usb2 {
status = "okay";
};
&usb3 {
status = "okay";
};

260
arch/arm/boot/dts/uniphier-sld3.dtsi
View File

@ -1,260 +0,0 @@
/*
* Device Tree Source for UniPhier sLD3 SoC
*
* Copyright (C) 2015-2016 Socionext Inc.
* Author: Masahiro Yamada <yamada.masahiro@socionext.com>
*
* SPDX-License-Identifier: (GPL-2.0+ OR MIT)
*/
/ {
compatible = "socionext,uniphier-sld3";
#address-cells = <1>;
#size-cells = <1>;
cpus {
#address-cells = <1>;
#size-cells = <0>;
cpu@0 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <0>;
enable-method = "psci";
next-level-cache = <&l2>;
};
cpu@1 {
device_type = "cpu";
compatible = "arm,cortex-a9";
reg = <1>;
enable-method = "psci";
next-level-cache = <&l2>;
};
};
psci {
compatible = "arm,psci-0.2";
method = "smc";
};
clocks {
refclk: ref {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <24576000>;
};
arm_timer_clk: arm_timer_clk {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <50000000>;
};
};
soc {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
ranges;
interrupt-parent = <&intc>;
timer@20000200 {
compatible = "arm,cortex-a9-global-timer";
reg = <0x20000200 0x20>;
interrupts = <1 11 0x304>;
clocks = <&arm_timer_clk>;
};
timer@20000600 {
compatible = "arm,cortex-a9-twd-timer";
reg = <0x20000600 0x20>;
interrupts = <1 13 0x304>;
clocks = <&arm_timer_clk>;
};
intc: interrupt-controller@20001000 {
compatible = "arm,cortex-a9-gic";
#interrupt-cells = <3>;
interrupt-controller;
reg = <0x20001000 0x1000>,
<0x20000100 0x100>;
};
l2: l2-cache@500c0000 {
compatible = "socionext,uniphier-system-cache";
reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
<0x506c0000 0x400>;
interrupts = <0 174 4>, <0 175 4>;
cache-unified;
cache-size = <(512 * 1024)>;
cache-sets = <256>;
cache-line-size = <128>;
cache-level = <2>;
};
serial0: serial@54006800 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006800 0x40>;
interrupts = <0 33 4>;
clocks = <&sys_clk 0>;
};
serial1: serial@54006900 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006900 0x40>;
interrupts = <0 35 4>;
clocks = <&sys_clk 0>;
};
serial2: serial@54006a00 {
compatible = "socionext,uniphier-uart";
status = "disabled";
reg = <0x54006a00 0x40>;
interrupts = <0 37 4>;
clocks = <&sys_clk 0>;
};
i2c0: i2c@58400000 {
compatible = "socionext,uniphier-i2c";
status = "disabled";
reg = <0x58400000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 41 1>;
clocks = <&sys_clk 1>;
clock-frequency = <100000>;
};
i2c1: i2c@58480000 {
compatible = "socionext,uniphier-i2c";
status = "disabled";
reg = <0x58480000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 42 1>;
clocks = <&sys_clk 1>;
clock-frequency = <100000>;
};
i2c2: i2c@58500000 {
compatible = "socionext,uniphier-i2c";
status = "disabled";
reg = <0x58500000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 43 1>;
clocks = <&sys_clk 1>;
clock-frequency = <100000>;
};
i2c3: i2c@58580000 {
compatible = "socionext,uniphier-i2c";
status = "disabled";
reg = <0x58580000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 44 1>;
clocks = <&sys_clk 1>;
clock-frequency = <100000>;
};
/* chip-internal connection for DMD */
i2c4: i2c@58600000 {
compatible = "socionext,uniphier-i2c";
reg = <0x58600000 0x40>;
#address-cells = <1>;
#size-cells = <0>;
interrupts = <0 45 1>;
clocks = <&sys_clk 1>;
clock-frequency = <400000>;
};
system_bus: system-bus@58c00000 {
compatible = "socionext,uniphier-system-bus";
status = "disabled";
reg = <0x58c00000 0x400>;
#address-cells = <2>;
#size-cells = <1>;
};
smpctrl@59801000 {
compatible = "socionext,uniphier-smpctrl";
reg = <0x59801000 0x400>;
};
mioctrl@59810000 {
compatible = "socionext,uniphier-sld3-mioctrl",
"simple-mfd", "syscon";
reg = <0x59810000 0x800>;
mio_clk: clock {
compatible = "socionext,uniphier-sld3-mio-clock";
#clock-cells = <1>;
};
mio_rst: reset {
compatible = "socionext,uniphier-sld3-mio-reset";
#reset-cells = <1>;
};
};
usb0: usb@5a800100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a800100 0x100>;
interrupts = <0 80 4>;
clocks = <&mio_clk 7>, <&mio_clk 8>, <&mio_clk 12>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 8>,
<&mio_rst 12>;
};
usb1: usb@5a810100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a810100 0x100>;
interrupts = <0 81 4>;
clocks = <&mio_clk 7>, <&mio_clk 9>, <&mio_clk 13>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 9>,
<&mio_rst 13>;
};
usb2: usb@5a820100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a820100 0x100>;
interrupts = <0 82 4>;
clocks = <&mio_clk 7>, <&mio_clk 10>, <&mio_clk 14>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 10>,
<&mio_rst 14>;
};
usb3: usb@5a830100 {
compatible = "socionext,uniphier-ehci", "generic-ehci";
status = "disabled";
reg = <0x5a830100 0x100>;
interrupts = <0 83 4>;
clocks = <&mio_clk 7>, <&mio_clk 11>, <&mio_clk 15>;
resets = <&sys_rst 8>, <&mio_rst 7>, <&mio_rst 11>,
<&mio_rst 15>;
};
sysctrl@f1840000 {
compatible = "socionext,uniphier-sld3-sysctrl",
"simple-mfd", "syscon";
reg = <0xf1840000 0x10000>;
sys_clk: clock {
compatible = "socionext,uniphier-sld3-clock";
#clock-cells = <1>;
};
sys_rst: reset {
compatible = "socionext,uniphier-sld3-reset";
#reset-cells = <1>;
};
};
};
};

10
arch/arm/boot/dts/uniphier-sld8-ref.dts
View File

@ -8,9 +8,9 @@
*/
/dts-v1/;
/include/ "uniphier-sld8.dtsi"
/include/ "uniphier-ref-daughter.dtsi"
/include/ "uniphier-support-card.dtsi"
#include "uniphier-sld8.dtsi"
#include "uniphier-ref-daughter.dtsi"
#include "uniphier-support-card.dtsi"
/ {
model = "UniPhier sLD8 Reference Board";
@ -68,3 +68,7 @@
&usb2 {
status = "okay";
};
&nand {
status = "okay";
};

13
arch/arm/boot/dts/uniphier-sld8.dtsi
View File

@ -285,7 +285,18 @@
#reset-cells = <1>;
};
};
nand: nand@68000000 {
compatible = "socionext,uniphier-denali-nand-v5a";
status = "disabled";
reg-names = "nand_data", "denali_reg";
reg = <0x68000000 0x20>, <0x68100000 0x1000>;
interrupts = <0 65 4>;
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_nand2cs>;
clocks = <&sys_clk 2>;
};
};
};
/include/ "uniphier-pinctrl.dtsi"
#include "uniphier-pinctrl.dtsi"