Documentation/gpu: Add amdgpu and dc glossary

In the DC driver, we have multiple acronyms that are not obvious most of
the time; the same idea is valid for amdgpu. This commit introduces a DC
and amdgpu glossary in order to make it easier to navigate through our
driver.

Changes since V3:
 - Yann: Add new acronyms to amdgpu glossary
 - Daniel: Add link between dc and amdgpu glossary

Changes since V2:
 - Add MMHUB

Changes since V1:
 - Yann: Divide glossary based on driver context.
 - Alex: Make terms more consistent and update CPLIB
 - Add new acronyms to the glossary

Reviewed-by: Yann Dirson <ydirson@free.fr>
Reviewed-by: Harry Wentland <harry.wentland@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Rodrigo Siqueira 2021-11-25 10:38:30 -05:00 committed by Alex Deucher
parent 522968aeed
commit a723c6d078
4 changed files with 332 additions and 0 deletions

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@ -0,0 +1,87 @@
===============
AMDGPU Glossary
===============
Here you can find some generic acronyms used in the amdgpu driver. Notice that
we have a dedicated glossary for Display Core at
'Documentation/gpu/amdgpu/display/dc-glossary.rst'.
.. glossary::
CP
Command Processor
CPLIB
Content Protection Library
DFS
Digital Frequency Synthesizer
ECP
Enhanced Content Protection
EOP
End Of Pipe/Pipeline
GC
Graphics and Compute
GMC
Graphic Memory Controller
IH
Interrupt Handler
HQD
Hardware Queue Descriptor
IB
Indirect Buffer
IP
Intellectual Property blocks
KCQ
Kernel Compute Queue
KGQ
Kernel Graphics Queue
KIQ
Kernel Interface Queue
MEC
MicroEngine Compute
MES
MicroEngine Scheduler
MMHUB
Multi-Media HUB
MQD
Memory Queue Descriptor
PPLib
PowerPlay Library - PowerPlay is the power management component.
PSP
Platform Security Processor
RCL
RunList Controller
SDMA
System DMA
SMU
System Management Unit
SS
Spread Spectrum
VCE
Video Compression Engine
VCN
Video Codec Next

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===========
DC Glossary
===========
On this page, we try to keep track of acronyms related to the display
component. If you do not find what you are looking for, look at the
'Documentation/gpu/amdgpu/amdgpu-glossary.rst'; if you cannot find it anywhere,
consider asking in the amdgfx and update this page.
.. glossary::
ABM
Adaptive Backlight Modulation
APU
Accelerated Processing Unit
ASIC
Application-Specific Integrated Circuit
ASSR
Alternate Scrambler Seed Reset
AZ
Azalia (HD audio DMA engine)
BPC
Bits Per Colour/Component
BPP
Bits Per Pixel
Clocks
* PCLK: Pixel Clock
* SYMCLK: Symbol Clock
* SOCCLK: GPU Engine Clock
* DISPCLK: Display Clock
* DPPCLK: DPP Clock
* DCFCLK: Display Controller Fabric Clock
* REFCLK: Real Time Reference Clock
* PPLL: Pixel PLL
* FCLK: Fabric Clock
* MCLK: Memory Clock
CRC
Cyclic Redundancy Check
CRTC
Cathode Ray Tube Controller - commonly called "Controller" - Generates
raw stream of pixels, clocked at pixel clock
CVT
Coordinated Video Timings
DAL
Display Abstraction layer
DC (Software)
Display Core
DC (Hardware)
Display Controller
DCC
Delta Colour Compression
DCE
Display Controller Engine
DCHUB
Display Controller HUB
ARB
Arbiter
VTG
Vertical Timing Generator
DCN
Display Core Next
DCCG
Display Clock Generator block
DDC
Display Data Channel
DIO
Display IO
DPP
Display Pipes and Planes
DSC
Display Stream Compression (Reduce the amount of bits to represent pixel
count while at the same pixel clock)
dGPU
discrete GPU
DMIF
Display Memory Interface
DML
Display Mode Library
DMCU
Display Micro-Controller Unit
DMCUB
Display Micro-Controller Unit, version B
DPCD
DisplayPort Configuration Data
DPM(S)
Display Power Management (Signaling)
DRR
Dynamic Refresh Rate
DWB
Display Writeback
FB
Frame Buffer
FBC
Frame Buffer Compression
FEC
Forward Error Correction
FRL
Fixed Rate Link
GCO
Graphical Controller Object
GSL
Global Swap Lock
iGPU
integrated GPU
ISR
Interrupt Service Request
ISV
Independent Software Vendor
KMD
Kernel Mode Driver
LB
Line Buffer
LFC
Low Framerate Compensation
LTTPR
Link Training Tunable Phy Repeater
LUT
Lookup Table
MALL
Memory Access at Last Level
MC
Memory Controller
MPC
Multiple pipes and plane combine
MPO
Multi Plane Overlay
MST
Multi Stream Transport
NBP State
Northbridge Power State
NBIO
North Bridge Input/Output
ODM
Output Data Mapping
OPM
Output Protection Manager
OPP
Output Plane Processor
OPTC
Output Pipe Timing Combiner
OTG
Output Timing Generator
PCON
Power Controller
PGFSM
Power Gate Finite State Machine
PSR
Panel Self Refresh
SCL
Scaler
SDP
Scalable Data Port
SLS
Single Large Surface
SST
Single Stream Transport
TMDS
Transition-Minimized Differential Signaling
TMZ
Trusted Memory Zone
TTU
Time to Underflow
VRR
Variable Refresh Rate
UVD
Unified Video Decoder

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@ -26,3 +26,4 @@ table of content:
display-manager.rst display-manager.rst
dc-debug.rst dc-debug.rst
dcn-overview.rst dcn-overview.rst
dc-glossary.rst

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@ -334,3 +334,10 @@ smartshift_bias
.. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c .. kernel-doc:: drivers/gpu/drm/amd/pm/amdgpu_pm.c
:doc: smartshift_bias :doc: smartshift_bias
AMDGPU Glossary
===============
.. toctree::
amdgpu-glossary.rst