clocksource: sh_cmt: CMCNT and CMCOR register access update
Break out the CMCNT and CMCOR register access code into separate 16-bit and 32-bit functions that are hooked into callbacks at init time. This reduces the amount of software calculations happening at runtime. Signed-off-by: Magnus Damm <damm@opensource.se> Acked-by: John Stultz <john.stultz@linaro.org> Tested-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -54,38 +54,39 @@ struct sh_cmt_priv {
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struct clocksource cs;
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unsigned long total_cycles;
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bool cs_enabled;
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/* callbacks for CMCNT and CMCOR access */
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unsigned long (*read_count)(void __iomem *base, unsigned long offs);
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void (*write_count)(void __iomem *base, unsigned long offs,
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unsigned long value);
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};
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static inline unsigned long sh_cmt_read16(void __iomem *base,
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unsigned long offs)
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static unsigned long sh_cmt_read16(void __iomem *base, unsigned long offs)
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{
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return ioread16(base + (offs << 1));
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}
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static inline void sh_cmt_write16(void __iomem *base, unsigned long offs,
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unsigned long value)
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static unsigned long sh_cmt_read32(void __iomem *base, unsigned long offs)
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{
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return ioread32(base + (offs << 2));
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}
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static void sh_cmt_write16(void __iomem *base, unsigned long offs,
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unsigned long value)
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{
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iowrite16(value, base + (offs << 1));
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}
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static void sh_cmt_write32(void __iomem *base, unsigned long offs,
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unsigned long value)
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{
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iowrite32(value, base + (offs << 2));
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}
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#define CMCSR 0 /* channel register */
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#define CMCNT 1 /* channel register */
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#define CMCOR 2 /* channel register */
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static inline unsigned long sh_cmt_read(struct sh_cmt_priv *p, int reg_nr)
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{
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void __iomem *base = p->mapbase;
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unsigned long offs = reg_nr;
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if (p->width == 16) {
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offs <<= 1;
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return ioread16(base + offs);
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} else {
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offs <<= 2;
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return ioread32(base + offs);
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}
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}
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static inline unsigned long sh_cmt_read_cmstr(struct sh_cmt_priv *p)
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{
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struct sh_timer_config *cfg = p->pdev->dev.platform_data;
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@ -100,22 +101,7 @@ static inline unsigned long sh_cmt_read_cmcsr(struct sh_cmt_priv *p)
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static inline unsigned long sh_cmt_read_cmcnt(struct sh_cmt_priv *p)
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{
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return sh_cmt_read(p, CMCNT);
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}
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static inline void sh_cmt_write(struct sh_cmt_priv *p, int reg_nr,
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unsigned long value)
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{
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void __iomem *base = p->mapbase;
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unsigned long offs = reg_nr;
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if (p->width == 16) {
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offs <<= 1;
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iowrite16(value, base + offs);
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} else {
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offs <<= 2;
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iowrite32(value, base + offs);
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}
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return p->read_count(p->mapbase, CMCNT);
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}
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static inline void sh_cmt_write_cmstr(struct sh_cmt_priv *p,
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@ -135,13 +121,13 @@ static inline void sh_cmt_write_cmcsr(struct sh_cmt_priv *p,
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static inline void sh_cmt_write_cmcnt(struct sh_cmt_priv *p,
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unsigned long value)
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{
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sh_cmt_write(p, CMCNT, value);
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p->write_count(p->mapbase, CMCNT, value);
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}
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static inline void sh_cmt_write_cmcor(struct sh_cmt_priv *p,
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unsigned long value)
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{
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sh_cmt_write(p, CMCOR, value);
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p->write_count(p->mapbase, CMCOR, value);
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}
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static unsigned long sh_cmt_get_counter(struct sh_cmt_priv *p,
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@ -718,10 +704,14 @@ static int sh_cmt_setup(struct sh_cmt_priv *p, struct platform_device *pdev)
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if (resource_size(res) == 6) {
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p->width = 16;
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p->read_count = sh_cmt_read16;
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p->write_count = sh_cmt_write16;
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p->overflow_bit = 0x80;
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p->clear_bits = ~0x80;
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} else {
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p->width = 32;
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p->read_count = sh_cmt_read32;
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p->write_count = sh_cmt_write32;
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p->overflow_bit = 0x8000;
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p->clear_bits = ~0xc000;
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}
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