sh_eth: add sh_eth_cpu_data::gecmr flag
Not all Ether controllers having the Gigabit register layout have GECMR -- RZ/A1 (AKA R7S72100) actually has the same layout but no Gigabit speed support and hence no GECMR. In the past, the new register map table was added for this SoC, now I think we should have used the existing Gigabit table with the differences (such as GECMR) covered by the mere flags in the 'struct sh_eth_cpu_data'. Add such flag for GECMR -- and then we can get rid of the R7S72100 specific layout in the next patch... Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> Tested-by: Chris Brandt <chris.brandt@renesas.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -569,6 +569,9 @@ static void sh_eth_set_rate_gether(struct net_device *ndev)
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{
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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struct sh_eth_private *mdp = netdev_priv(ndev);
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if (WARN_ON(!mdp->cd->gecmr))
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return;
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switch (mdp->speed) {
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switch (mdp->speed) {
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case 10: /* 10BASE */
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case 10: /* 10BASE */
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sh_eth_write(ndev, GECMR_10, GECMR);
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sh_eth_write(ndev, GECMR_10, GECMR);
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@ -663,6 +666,7 @@ static struct sh_eth_cpu_data r8a7740_data = {
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.apr = 1,
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.apr = 1,
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.mpr = 1,
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.mpr = 1,
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.tpauser = 1,
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.tpauser = 1,
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.gecmr = 1,
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.bculr = 1,
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.bculr = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.rpadir = 1,
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.rpadir = 1,
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@ -788,6 +792,7 @@ static struct sh_eth_cpu_data r8a77980_data = {
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.apr = 1,
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.apr = 1,
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.mpr = 1,
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.mpr = 1,
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.tpauser = 1,
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.tpauser = 1,
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.gecmr = 1,
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.bculr = 1,
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.bculr = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.nbst = 1,
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.nbst = 1,
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@ -957,6 +962,9 @@ static void sh_eth_set_rate_giga(struct net_device *ndev)
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{
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{
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struct sh_eth_private *mdp = netdev_priv(ndev);
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struct sh_eth_private *mdp = netdev_priv(ndev);
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if (WARN_ON(!mdp->cd->gecmr))
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return;
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switch (mdp->speed) {
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switch (mdp->speed) {
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case 10: /* 10BASE */
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case 10: /* 10BASE */
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sh_eth_write(ndev, 0x00000000, GECMR);
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sh_eth_write(ndev, 0x00000000, GECMR);
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@ -1002,6 +1010,7 @@ static struct sh_eth_cpu_data sh7757_data_giga = {
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.apr = 1,
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.apr = 1,
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.mpr = 1,
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.mpr = 1,
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.tpauser = 1,
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.tpauser = 1,
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.gecmr = 1,
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.bculr = 1,
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.bculr = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.rpadir = 1,
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.rpadir = 1,
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@ -1042,6 +1051,7 @@ static struct sh_eth_cpu_data sh7734_data = {
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.apr = 1,
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.apr = 1,
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.mpr = 1,
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.mpr = 1,
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.tpauser = 1,
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.tpauser = 1,
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.gecmr = 1,
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.bculr = 1,
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.bculr = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.no_trimd = 1,
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.no_trimd = 1,
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@ -1083,6 +1093,7 @@ static struct sh_eth_cpu_data sh7763_data = {
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.apr = 1,
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.apr = 1,
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.mpr = 1,
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.mpr = 1,
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.tpauser = 1,
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.tpauser = 1,
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.gecmr = 1,
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.bculr = 1,
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.bculr = 1,
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.hw_swap = 1,
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.hw_swap = 1,
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.no_trimd = 1,
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.no_trimd = 1,
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@ -2181,7 +2192,8 @@ static size_t __sh_eth_get_regs(struct net_device *ndev, u32 *buf)
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if (cd->tpauser)
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if (cd->tpauser)
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add_reg(TPAUSER);
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add_reg(TPAUSER);
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add_reg(TPAUSECR);
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add_reg(TPAUSECR);
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add_reg(GECMR);
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if (cd->gecmr)
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add_reg(GECMR);
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if (cd->bculr)
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if (cd->bculr)
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add_reg(BCULR);
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add_reg(BCULR);
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add_reg(MAHR);
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add_reg(MAHR);
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@ -490,6 +490,7 @@ struct sh_eth_cpu_data {
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unsigned apr:1; /* EtherC has APR */
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unsigned apr:1; /* EtherC has APR */
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unsigned mpr:1; /* EtherC has MPR */
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unsigned mpr:1; /* EtherC has MPR */
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unsigned tpauser:1; /* EtherC has TPAUSER */
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unsigned tpauser:1; /* EtherC has TPAUSER */
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unsigned gecmr:1; /* EtherC has GECMR */
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unsigned bculr:1; /* EtherC has BCULR */
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unsigned bculr:1; /* EtherC has BCULR */
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unsigned tsu:1; /* EtherC has TSU */
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unsigned tsu:1; /* EtherC has TSU */
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unsigned hw_swap:1; /* E-DMAC has DE bit in EDMR */
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unsigned hw_swap:1; /* E-DMAC has DE bit in EDMR */
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