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ARM: tegra: Changes for v4.7-rc1 

A couple of patches that cleanup some Kconfig, enable various features,
 use stdout-path to define the debug serial port (so that it doesn't have
 to be manually specified on the kernel command-line) and cleanup and fix
 some minor device trees bugs.
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Merge tag 'tegra-for-4.7-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into next/dt

Merge "ARM: tegra: Changes for v4.7-rc1" from Thierry Reding:

A couple of patches that cleanup some Kconfig, enable various features,
use stdout-path to define the debug serial port (so that it doesn't have
to be manually specified on the kernel command-line) and cleanup and fix
some minor device trees bugs.

* tag 'tegra-for-4.7-arm' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  ARM: tegra: Correct interrupt type for ARM TWD
  ARM: tegra: Add stdout-path for various boards
  ARM: tegra: Replace legacy *,wakeup property with wakeup-source
  ARM: tegra: Enable watchdog support for Tegra114 and Tegra124
  ARM: tegra: Add high speed UARTs to Jetson TK1 device tree
  ARM: tegra: Fix copy/paste typo in several DTS includes
  ARM: tegra: Remove redundant ARM_L1_CACHE_SHIFT_6 select
This commit is contained in:
Arnd Bergmann 2016-04-24 23:27:30 +02:00
parent cb3ba4f716 e7d9b2709a
commit a5cc8c3a71
24 changed files with 119 additions and 27 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
arch/arm/boot/dts/tegra114-dalmore.dts
View File

@ -18,6 +18,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x80000000 0x40000000>;
};
@ -1164,7 +1168,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
volume_down {

2
arch/arm/boot/dts/tegra114-roth.dts
View File

@ -1047,7 +1047,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};

2
arch/arm/boot/dts/tegra114-tn7.dts
View File

@ -292,7 +292,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
volume_down {

4
arch/arm/boot/dts/tegra114.dtsi
View File

@ -150,7 +150,7 @@
};
timer@60005000 {
compatible = "nvidia,tegra114-timer", "nvidia,tegra20-timer";
compatible = "nvidia,tegra114-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x60005000 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
@ -256,7 +256,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra114-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is
* the APB DMA based serial driver, the compatible is
* "nvidia,tegra114-hsuart", "nvidia,tegra30-hsuart".
*/
uarta: serial@70006000 {

32
arch/arm/boot/dts/tegra124-jetson-tk1.dts
View File

@ -12,7 +12,15 @@
aliases {
rtc0 = "/i2c@0,7000d000/pmic@40";
rtc1 = "/rtc@0,7000e000";
/* This order keeps the mapping DB9 connector <-> ttyS0 */
serial0 = &uartd;
serial1 = &uarta;
serial2 = &uartb;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
@ -1367,6 +1375,28 @@
};
};
/*
* First high speed UART, exposed on the expansion connector J3A2
* Pin 41: BR_UART1_TXD
* Pin 44: BR_UART1_RXD
*/
serial@70006000 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
status = "okay";
};
/*
* Second high speed UART, exposed on the expansion connector J3A2
* Pin 65: UART2_RXD
* Pin 68: UART2_TXD
* Pin 71: UART2_CTS_L
* Pin 74: UART2_RTS_L
*/
serial@70006040 {
compatible = "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart";
status = "okay";
};
/* DB9 serial port */
serial@0,70006300 {
status = "okay";
@ -1761,7 +1791,7 @@
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
gpio-key,wakeup;
wakeup-source;
};
};

8
arch/arm/boot/dts/tegra124-nyan.dtsi
View File

@ -8,6 +8,10 @@
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
@ -509,7 +513,7 @@
linux,input-type = <5>;
linux,code = <KEY_RESERVED>;
debounce-interval = <1>;
gpio-key,wakeup;
wakeup-source;
};
power {
@ -517,7 +521,7 @@
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <30>;
gpio-key,wakeup;
wakeup-source;
};
};

6
arch/arm/boot/dts/tegra124-venice2.dts
View File

@ -13,6 +13,10 @@
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x0 0x80000000 0x0 0x80000000>;
};
@ -975,7 +979,7 @@
gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
debounce-interval = <10>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/tegra124.dtsi
View File

@ -208,7 +208,7 @@
};
timer@0,60005000 {
compatible = "nvidia,tegra124-timer", "nvidia,tegra20-timer";
compatible = "nvidia,tegra124-timer", "nvidia,tegra30-timer", "nvidia,tegra20-timer";
reg = <0x0 0x60005000 0x0 0x400>;
interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
<GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
@ -322,7 +322,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra124-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is
* the APB DMA based serial driver, the compatible is
* "nvidia,tegra124-hsuart", "nvidia,tegra30-hsuart".
*/
uarta: serial@0,70006000 {

6
arch/arm/boot/dts/tegra20-harmony.dts
View File

@ -13,6 +13,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x40000000>;
};
@ -655,7 +659,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/tegra20-iris-512.dts
View File

@ -11,6 +11,10 @@
serial1 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
host1x@50000000 {
hdmi@54280000 {
status = "okay";

4
arch/arm/boot/dts/tegra20-medcom-wide.dts
View File

@ -10,6 +10,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
pwm@7000a000 {
status = "okay";
};

6
arch/arm/boot/dts/tegra20-paz00.dts
View File

@ -14,6 +14,10 @@
serial1 = &uartc;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x20000000>;
};
@ -521,7 +525,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(J, 7) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};

8
arch/arm/boot/dts/tegra20-seaboard.dts
View File

@ -13,6 +13,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x40000000>;
};
@ -807,7 +811,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
lid {
@ -816,7 +820,7 @@
linux,input-type = <5>; /* EV_SW */
linux,code = <0>; /* SW_LID */
debounce-interval = <1>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/tegra20-tamonten.dtsi
View File

@ -10,6 +10,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x20000000>;
};

6
arch/arm/boot/dts/tegra20-trimslice.dts
View File

@ -13,6 +13,10 @@
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x40000000>;
};
@ -392,7 +396,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(X, 6) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};

6
arch/arm/boot/dts/tegra20-ventana.dts
View File

@ -13,6 +13,10 @@
serial0 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x40000000>;
};
@ -601,7 +605,7 @@
label = "Power";
gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>;
linux,code = <KEY_POWER>;
gpio-key,wakeup;
wakeup-source;
};
};

6
arch/arm/boot/dts/tegra20-whistler.dts
View File

@ -13,6 +13,10 @@
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x00000000 0x20000000>;
};
@ -508,7 +512,7 @@
nvidia,repeat-delay-ms = <160>;
nvidia,kbc-row-pins = <0 1 2>;
nvidia,kbc-col-pins = <16 17>;
nvidia,wakeup-source;
wakeup-source;
linux,keymap = <MATRIX_KEY(0x00, 0x00, KEY_POWER)
MATRIX_KEY(0x01, 0x00, KEY_HOME)
MATRIX_KEY(0x01, 0x01, KEY_BACK)

4
arch/arm/boot/dts/tegra20.dtsi
View File

@ -145,7 +145,7 @@
interrupt-parent = <&intc>;
reg = <0x50040600 0x20>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
(GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_EDGE_RISING)>;
clocks = <&tegra_car TEGRA20_CLK_TWD>;
};
@ -309,7 +309,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra20-uart" and to enable the APB DMA based serial
* driver, the comptible is "nvidia,tegra20-hsuart".
* driver, the compatible is "nvidia,tegra20-hsuart".
*/
uarta: serial@70006000 {
compatible = "nvidia,tegra20-uart";

6
arch/arm/boot/dts/tegra30-apalis-eval.dts
View File

@ -17,6 +17,10 @@
serial3 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
pcie-controller@00003000 {
status = "okay";
@ -196,7 +200,7 @@
gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_LOW>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/tegra30-beaver.dts
View File

@ -12,6 +12,10 @@
serial0 = &uarta;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x80000000 0x7ff00000>;
};

6
arch/arm/boot/dts/tegra30-cardhu.dtsi
View File

@ -35,6 +35,10 @@
serial1 = &uartc;
};
chosen {
stdout-path = "serial0:115200n8";
};
memory {
reg = <0x80000000 0x40000000>;
};
@ -626,7 +630,7 @@
interrupts = <2 0>;
linux,code = <KEY_POWER>;
debounce-interval = <100>;
gpio-key,wakeup;
wakeup-source;
};
volume-down {

6
arch/arm/boot/dts/tegra30-colibri-eval-v3.dts
View File

@ -15,6 +15,10 @@
serial2 = &uartd;
};
chosen {
stdout-path = "serial0:115200n8";
};
host1x@50000000 {
dc@54200000 {
rgb {
@ -142,7 +146,7 @@
gpios = <&gpio TEGRA_GPIO(V, 1) GPIO_ACTIVE_HIGH>;
linux,code = <KEY_WAKEUP>;
debounce-interval = <10>;
gpio-key,wakeup;
wakeup-source;
};
};

4
arch/arm/boot/dts/tegra30.dtsi
View File

@ -230,7 +230,7 @@
reg = <0x50040600 0x20>;
interrupt-parent = <&intc>;
interrupts = <GIC_PPI 13
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_EDGE_RISING)>;
clocks = <&tegra_car TEGRA30_CLK_TWD>;
};
@ -371,7 +371,7 @@
* driver and APB DMA based serial driver for higher baudrate
* and performace. To enable the 8250 based driver, the compatible
* is "nvidia,tegra30-uart", "nvidia,tegra20-uart" and to enable
* the APB DMA based serial driver, the comptible is
* the APB DMA based serial driver, the compatible is
* "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart".
*/
uarta: serial@70006000 {

2
drivers/soc/tegra/Kconfig
View File

@ -31,7 +31,6 @@ config ARCH_TEGRA_3x_SOC
config ARCH_TEGRA_114_SOC
bool "Enable support for Tegra114 family"
select ARM_ERRATA_798181 if SMP
select ARM_L1_CACHE_SHIFT_6
select HAVE_ARM_ARCH_TIMER
select PINCTRL_TEGRA114
select TEGRA_TIMER
@ -41,7 +40,6 @@ config ARCH_TEGRA_114_SOC
config ARCH_TEGRA_124_SOC
bool "Enable support for Tegra124 family"
select ARM_L1_CACHE_SHIFT_6
select HAVE_ARM_ARCH_TIMER
select PINCTRL_TEGRA124
select TEGRA_TIMER