PM / devfreq: rk3399_dmc: Use bitfield macro definitions for ODT_PD
We're going to add new usages, and it's cleaner to work with macros instead of comments and magic numbers. Signed-off-by: Brian Norris <briannorris@chromium.org> Signed-off-by: Chanwoo Choi <cw00.choi@samsung.com>
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@ -5,6 +5,7 @@
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*/
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#include <linux/arm-smccc.h>
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#include <linux/bitfield.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/devfreq.h>
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@ -23,6 +24,15 @@
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#include <soc/rockchip/rk3399_grf.h>
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#include <soc/rockchip/rockchip_sip.h>
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#define RK3399_SET_ODT_PD_0_SR_IDLE GENMASK(7, 0)
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#define RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE GENMASK(15, 8)
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#define RK3399_SET_ODT_PD_0_STANDBY_IDLE GENMASK(31, 16)
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#define RK3399_SET_ODT_PD_1_PD_IDLE GENMASK(11, 0)
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#define RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE GENMASK(27, 16)
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#define RK3399_SET_ODT_PD_2_ODT_ENABLE BIT(0)
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struct rk3399_dmcfreq {
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struct device *dev;
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struct devfreq *devfreq;
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@ -55,7 +65,6 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
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unsigned long old_clk_rate = dmcfreq->rate;
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unsigned long target_volt, target_rate;
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struct arm_smccc_res res;
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bool odt_enable = false;
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int err;
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opp = devfreq_recommended_opp(dev, freq, flags);
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@ -72,8 +81,10 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
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mutex_lock(&dmcfreq->lock);
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if (dmcfreq->regmap_pmu) {
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unsigned int odt_pd_arg2 = 0;
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if (target_rate >= dmcfreq->odt_dis_freq)
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odt_enable = true;
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odt_pd_arg2 |= RK3399_SET_ODT_PD_2_ODT_ENABLE;
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/*
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* This makes a SMC call to the TF-A to set the DDR PD
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@ -83,7 +94,7 @@ static int rk3399_dmcfreq_target(struct device *dev, unsigned long *freq,
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arm_smccc_smc(ROCKCHIP_SIP_DRAM_FREQ, dmcfreq->odt_pd_arg0,
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dmcfreq->odt_pd_arg1,
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ROCKCHIP_SIP_CONFIG_DRAM_SET_ODT_PD,
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odt_enable, 0, 0, 0, &res);
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odt_pd_arg2, 0, 0, 0, &res);
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}
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/*
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@ -316,23 +327,17 @@ no_pmu:
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/*
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* In TF-A there is a platform SIP call to set the PD (power-down)
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* timings and to enable or disable the ODT (on-die termination).
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* This call needs three arguments as follows:
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*
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* arg0:
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* bit[0-7] : sr_idle
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* bit[8-15] : sr_mc_gate_idle
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* bit[16-31] : standby idle
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* arg1:
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* bit[0-11] : pd_idle
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* bit[16-27] : srpd_lite_idle
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* arg2:
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* bit[0] : odt enable
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*/
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data->odt_pd_arg0 = (data->sr_idle & 0xff) |
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((data->sr_mc_gate_idle & 0xff) << 8) |
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((data->standby_idle & 0xffff) << 16);
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data->odt_pd_arg1 = (data->pd_idle & 0xfff) |
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((data->srpd_lite_idle & 0xfff) << 16);
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data->odt_pd_arg0 =
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FIELD_PREP(RK3399_SET_ODT_PD_0_SR_IDLE, data->sr_idle) |
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FIELD_PREP(RK3399_SET_ODT_PD_0_SR_MC_GATE_IDLE,
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data->sr_mc_gate_idle) |
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FIELD_PREP(RK3399_SET_ODT_PD_0_STANDBY_IDLE,
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data->standby_idle);
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data->odt_pd_arg1 =
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FIELD_PREP(RK3399_SET_ODT_PD_1_PD_IDLE, data->pd_idle) |
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FIELD_PREP(RK3399_SET_ODT_PD_1_SRPD_LITE_IDLE,
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data->srpd_lite_idle);
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/*
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* We add a devfreq driver to our parent since it has a device tree node
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