memory: mtk-smi: Rename smi_gen to smi_type
Prepare for adding smi sub common. Only rename from smi_gen to smi_type. No functional change. About the current "smi_gen", we have gen1/gen2 that stand for the generation number for HW. I plan to add a new type(sub_common), then the name "gen" is not proper. Signed-off-by: Yong Wu <yong.wu@mediatek.com> Reviewed-by: Ikjoon Jang <ikjn@chromium.org> Link: https://lore.kernel.org/r/20210914113703.31466-5-yong.wu@mediatek.com Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com>
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@ -55,7 +55,7 @@
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/* All are MMU0 defaultly. Only specialize mmu1 here. */
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/* All are MMU0 defaultly. Only specialize mmu1 here. */
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#define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
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#define F_MMU1_LARB(larbid) (0x1 << SMI_BUS_LARB_SHIFT(larbid))
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enum mtk_smi_gen {
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enum mtk_smi_type {
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MTK_SMI_GEN1,
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MTK_SMI_GEN1,
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MTK_SMI_GEN2
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MTK_SMI_GEN2
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};
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};
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@ -75,9 +75,9 @@ static const char * const mtk_smi_common_clks[] = {"apb", "smi", "gals0", "gals1
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#define MTK_SMI_COM_GALS_REQ_CLK_NR MTK_SMI_CLK_NR_MAX
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#define MTK_SMI_COM_GALS_REQ_CLK_NR MTK_SMI_CLK_NR_MAX
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struct mtk_smi_common_plat {
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struct mtk_smi_common_plat {
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enum mtk_smi_gen gen;
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enum mtk_smi_type type;
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bool has_gals;
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bool has_gals;
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u32 bus_sel; /* Balance some larbs to enter mmu0 or mmu1 */
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u32 bus_sel; /* Balance some larbs to enter mmu0 or mmu1 */
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};
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};
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struct mtk_smi_larb_gen {
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struct mtk_smi_larb_gen {
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@ -409,29 +409,29 @@ static struct platform_driver mtk_smi_larb_driver = {
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};
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};
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static const struct mtk_smi_common_plat mtk_smi_common_gen1 = {
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static const struct mtk_smi_common_plat mtk_smi_common_gen1 = {
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.gen = MTK_SMI_GEN1,
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.type = MTK_SMI_GEN1,
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};
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};
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static const struct mtk_smi_common_plat mtk_smi_common_gen2 = {
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static const struct mtk_smi_common_plat mtk_smi_common_gen2 = {
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.gen = MTK_SMI_GEN2,
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.type = MTK_SMI_GEN2,
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};
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};
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static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
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static const struct mtk_smi_common_plat mtk_smi_common_mt6779 = {
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.gen = MTK_SMI_GEN2,
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.type = MTK_SMI_GEN2,
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.has_gals = true,
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.has_gals = true,
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(4) |
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F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
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F_MMU1_LARB(5) | F_MMU1_LARB(6) | F_MMU1_LARB(7),
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};
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};
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static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
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static const struct mtk_smi_common_plat mtk_smi_common_mt8183 = {
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.gen = MTK_SMI_GEN2,
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.type = MTK_SMI_GEN2,
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.has_gals = true,
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.has_gals = true,
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
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F_MMU1_LARB(7),
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F_MMU1_LARB(7),
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};
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};
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static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {
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static const struct mtk_smi_common_plat mtk_smi_common_mt8192 = {
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.gen = MTK_SMI_GEN2,
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.type = MTK_SMI_GEN2,
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.has_gals = true,
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.has_gals = true,
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
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.bus_sel = F_MMU1_LARB(1) | F_MMU1_LARB(2) | F_MMU1_LARB(5) |
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F_MMU1_LARB(6),
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F_MMU1_LARB(6),
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@ -494,7 +494,7 @@ static int mtk_smi_common_probe(struct platform_device *pdev)
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* clock into emi clock domain, but for mtk smi gen2, there's no smi ao
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* clock into emi clock domain, but for mtk smi gen2, there's no smi ao
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* base.
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* base.
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*/
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*/
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if (common->plat->gen == MTK_SMI_GEN1) {
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if (common->plat->type == MTK_SMI_GEN1) {
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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common->smi_ao_base = devm_ioremap_resource(dev, res);
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common->smi_ao_base = devm_ioremap_resource(dev, res);
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if (IS_ERR(common->smi_ao_base))
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if (IS_ERR(common->smi_ao_base))
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@ -534,7 +534,7 @@ static int __maybe_unused mtk_smi_common_resume(struct device *dev)
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if (ret)
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if (ret)
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return ret;
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return ret;
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if (common->plat->gen == MTK_SMI_GEN2 && bus_sel)
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if (common->plat->type == MTK_SMI_GEN2 && bus_sel)
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writel(bus_sel, common->base + SMI_BUS_SEL);
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writel(bus_sel, common->base + SMI_BUS_SEL);
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return 0;
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return 0;
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}
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}
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