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net: am79c961a: avoid %? in inline assembly 

The am79c961a.c driver fails to build with clang because of an
unusual inline assembly construct:

drivers/net/ethernet/amd/am79c961a.c:53:7: error: invalid % escape in inline assembly string
 "str%?h        %1, [%2]        @ NET_RAP\n\t"

The same change has been done a decade ago in arch/arm as of
6a39dd6222 ("[ARM] 3759/2: Remove uses of %?"), but apparently
some drivers were missed.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Arnd Bergmann 2016-02-08 15:33:42 +01:00 committed by David S. Miller
parent bd59cfc51d
commit a5a23ad52d
1 changed files with 32 additions and 32 deletions
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64
drivers/net/ethernet/amd/am79c961a.c
View File

@ -50,8 +50,8 @@ static const char version[] =
static void write_rreg(u_long base, u_int reg, u_int val) static void write_rreg(u_long base, u_int reg, u_int val)
{ {
asm volatile( asm volatile(
"str%?h %1, [%2] @ NET_RAP\n\t" "strh %1, [%2] @ NET_RAP\n\t"
"str%?h %0, [%2, #-4] @ NET_RDP" "strh %0, [%2, #-4] @ NET_RDP"
: :
: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464)); : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
} }
@ -60,8 +60,8 @@ static inline unsigned short read_rreg(u_long base_addr, u_int reg)
{ {
unsigned short v; unsigned short v;
asm volatile( asm volatile(
"str%?h %1, [%2] @ NET_RAP\n\t" "strh %1, [%2] @ NET_RAP\n\t"
"ldr%?h %0, [%2, #-4] @ NET_RDP" "ldrh %0, [%2, #-4] @ NET_RDP"
: "=r" (v) : "=r" (v)
: "r" (reg), "r" (ISAIO_BASE + 0x0464)); : "r" (reg), "r" (ISAIO_BASE + 0x0464));
return v; return v;
@ -70,8 +70,8 @@ static inline unsigned short read_rreg(u_long base_addr, u_int reg)
static inline void write_ireg(u_long base, u_int reg, u_int val) static inline void write_ireg(u_long base, u_int reg, u_int val)
{ {
asm volatile( asm volatile(
"str%?h %1, [%2] @ NET_RAP\n\t" "strh %1, [%2] @ NET_RAP\n\t"
"str%?h %0, [%2, #8] @ NET_IDP" "strh %0, [%2, #8] @ NET_IDP"
: :
: "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464)); : "r" (val), "r" (reg), "r" (ISAIO_BASE + 0x0464));
} }
@ -80,8 +80,8 @@ static inline unsigned short read_ireg(u_long base_addr, u_int reg)
{ {
u_short v; u_short v;
asm volatile( asm volatile(
"str%?h %1, [%2] @ NAT_RAP\n\t" "strh %1, [%2] @ NAT_RAP\n\t"
"ldr%?h %0, [%2, #8] @ NET_IDP\n\t" "ldrh %0, [%2, #8] @ NET_IDP\n\t"
: "=r" (v) : "=r" (v)
: "r" (reg), "r" (ISAIO_BASE + 0x0464)); : "r" (reg), "r" (ISAIO_BASE + 0x0464));
return v; return v;
@ -96,7 +96,7 @@ am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigne
offset = ISAMEM_BASE + (offset << 1); offset = ISAMEM_BASE + (offset << 1);
length = (length + 1) & ~1; length = (length + 1) & ~1;
if ((int)buf & 2) { if ((int)buf & 2) {
asm volatile("str%?h %2, [%0], #4" asm volatile("strh %2, [%0], #4"
: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
buf += 2; buf += 2;
length -= 2; length -= 2;
@ -104,20 +104,20 @@ am_writebuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigne
while (length > 8) { while (length > 8) {
register unsigned int tmp asm("r2"), tmp2 asm("r3"); register unsigned int tmp asm("r2"), tmp2 asm("r3");
asm volatile( asm volatile(
"ldm%?ia %0!, {%1, %2}" "ldmia %0!, {%1, %2}"
: "+r" (buf), "=&r" (tmp), "=&r" (tmp2)); : "+r" (buf), "=&r" (tmp), "=&r" (tmp2));
length -= 8; length -= 8;
asm volatile( asm volatile(
"str%?h %1, [%0], #4\n\t" "strh %1, [%0], #4\n\t"
"mov%? %1, %1, lsr #16\n\t" "mov %1, %1, lsr #16\n\t"
"str%?h %1, [%0], #4\n\t" "strh %1, [%0], #4\n\t"
"str%?h %2, [%0], #4\n\t" "strh %2, [%0], #4\n\t"
"mov%? %2, %2, lsr #16\n\t" "mov %2, %2, lsr #16\n\t"
"str%?h %2, [%0], #4" "strh %2, [%0], #4"
: "+r" (offset), "=&r" (tmp), "=&r" (tmp2)); : "+r" (offset), "=&r" (tmp), "=&r" (tmp2));
} }
while (length > 0) { while (length > 0) {
asm volatile("str%?h %2, [%0], #4" asm volatile("strh %2, [%0], #4"
: "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8))); : "=&r" (offset) : "0" (offset), "r" (buf[0] | (buf[1] << 8)));
buf += 2; buf += 2;
length -= 2; length -= 2;
@ -132,23 +132,23 @@ am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned
if ((int)buf & 2) { if ((int)buf & 2) {
unsigned int tmp; unsigned int tmp;
asm volatile( asm volatile(
"ldr%?h %2, [%0], #4\n\t" "ldrh %2, [%0], #4\n\t"
"str%?b %2, [%1], #1\n\t" "strb %2, [%1], #1\n\t"
"mov%? %2, %2, lsr #8\n\t" "mov %2, %2, lsr #8\n\t"
"str%?b %2, [%1], #1" "strb %2, [%1], #1"
: "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf)); : "=&r" (offset), "=&r" (buf), "=r" (tmp): "0" (offset), "1" (buf));
length -= 2; length -= 2;
} }
while (length > 8) { while (length > 8) {
register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3; register unsigned int tmp asm("r2"), tmp2 asm("r3"), tmp3;
asm volatile( asm volatile(
"ldr%?h %2, [%0], #4\n\t" "ldrh %2, [%0], #4\n\t"
"ldr%?h %4, [%0], #4\n\t" "ldrh %4, [%0], #4\n\t"
"ldr%?h %3, [%0], #4\n\t" "ldrh %3, [%0], #4\n\t"
"orr%? %2, %2, %4, lsl #16\n\t" "orr %2, %2, %4, lsl #16\n\t"
"ldr%?h %4, [%0], #4\n\t" "ldrh %4, [%0], #4\n\t"
"orr%? %3, %3, %4, lsl #16\n\t" "orr %3, %3, %4, lsl #16\n\t"
"stm%?ia %1!, {%2, %3}" "stmia %1!, {%2, %3}"
: "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3) : "=&r" (offset), "=&r" (buf), "=r" (tmp), "=r" (tmp2), "=r" (tmp3)
: "0" (offset), "1" (buf)); : "0" (offset), "1" (buf));
length -= 8; length -= 8;
@ -156,10 +156,10 @@ am_readbuffer(struct net_device *dev, u_int offset, unsigned char *buf, unsigned
while (length > 0) { while (length > 0) {
unsigned int tmp; unsigned int tmp;
asm volatile( asm volatile(
"ldr%?h %2, [%0], #4\n\t" "ldrh %2, [%0], #4\n\t"
"str%?b %2, [%1], #1\n\t" "strb %2, [%1], #1\n\t"
"mov%? %2, %2, lsr #8\n\t" "mov %2, %2, lsr #8\n\t"
"str%?b %2, [%1], #1" "strb %2, [%1], #1"
: "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf)); : "=&r" (offset), "=&r" (buf), "=r" (tmp) : "0" (offset), "1" (buf));
length -= 2; length -= 2;
} }