V4L/DVB (7726): cx23885: Enable cx23417 support on the HVR1800
cx23885: Enable cx23417 support on the HVR1800 Signed-off-by: Steven Toth <stoth@hauppauge.com> Signed-off-by: Michael Krufky <mkrufky@linuxtv.org> Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
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@ -73,6 +73,7 @@ struct cx23885_board cx23885_boards[] = {
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[CX23885_BOARD_HAUPPAUGE_HVR1800] = {
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.name = "Hauppauge WinTV-HVR1800",
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.porta = CX23885_ANALOG_VIDEO,
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.portb = CX23885_MPEG_ENCODER,
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.portc = CX23885_MPEG_DVB,
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.tuner_type = TUNER_PHILIPS_TDA8290,
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.tuner_addr = 0x42, /* 0x84 >> 1 */
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@ -336,6 +337,10 @@ void cx23885_gpio_setup(struct cx23885_dev *dev)
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/* GPIO-15-18 cx23417 READY, CS, RD, WR */
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/* GPIO-19 IR_RX */
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/* CX23417 GPIO's */
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/* EIO15 Zilog Reset */
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/* EIO14 S5H1409/CX24227 Reset */
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/* Force the TDA8295A into reset and back */
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cx_set(GP0_IO, 0x00040004);
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mdelay(20);
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@ -443,10 +448,25 @@ void cx23885_card_setup(struct cx23885_dev *dev)
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ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1800:
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/* Defaults for VID B - Analog encoder */
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/* DREQ_POL, SMODE, PUNC_CLK, MCLK_POL Serial bus + punc clk */
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ts1->gen_ctrl_val = 0x10e;
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ts1->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts1->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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/* APB_TSVALERR_POL (active low)*/
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ts1->vld_misc_val = 0x2000;
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ts1->hw_sop_ctrl_val = (0x47 << 16 | 188 << 4 | 0xc);
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/* Defaults for VID C */
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ts2->gen_ctrl_val = 0xc; /* Serial bus + punctured clock */
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ts2->ts_clk_en_val = 0x1; /* Enable TS_CLK */
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ts2->src_sel_val = CX23885_SRC_SEL_PARALLEL_MPEG_VIDEO;
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break;
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case CX23885_BOARD_HAUPPAUGE_HVR1250:
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case CX23885_BOARD_HAUPPAUGE_HVR1500:
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case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
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case CX23885_BOARD_HAUPPAUGE_HVR1800:
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case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
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case CX23885_BOARD_HAUPPAUGE_HVR1200:
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case CX23885_BOARD_HAUPPAUGE_HVR1700:
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@ -1037,6 +1037,7 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
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struct cx23885_buffer *buf)
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{
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struct cx23885_dev *dev = port->dev;
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u32 reg;
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dprintk(1, "%s() w: %d, h: %d, f: %d\n", __func__,
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buf->vb.width, buf->vb.height, buf->vb.field);
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@ -1062,6 +1063,9 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
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return -EINVAL;
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}
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if (cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER)
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cx23885_av_clk(dev, 0);
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udelay(100);
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/* If the port supports SRC SELECT, configure it */
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@ -1079,6 +1083,21 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
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cx_write(port->reg_gpcnt_ctl, 3);
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q->count = 1;
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if (cx23885_boards[dev->board].portb & CX23885_MPEG_ENCODER) {
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reg = cx_read(PAD_CTRL);
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reg = reg & ~0x1; /* Clear TS1_OE */
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/* FIXME, bit 2 writing here is questionable */
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/* set TS1_SOP_OE and TS1_OE_HI */
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reg = reg | 0xa;
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cx_write(PAD_CTRL, reg);
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/* FIXME and these two registers should be documented. */
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cx_write(CLK_DELAY, cx_read(CLK_DELAY) | 0x80000011);
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cx_write(ALT_PIN_OUT_SEL, 0x10100045);
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}
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switch(dev->bridge) {
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case CX23885_BRIDGE_885:
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case CX23885_BRIDGE_887:
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@ -1094,6 +1113,9 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
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cx_set(DEV_CNTRL2, (1<<5)); /* Enable RISC controller */
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if (cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER)
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cx23885_av_clk(dev, 1);
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if (debug > 4)
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cx23885_tsport_reg_dump(port);
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@ -1103,12 +1125,32 @@ static int cx23885_start_dma(struct cx23885_tsport *port,
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static int cx23885_stop_dma(struct cx23885_tsport *port)
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{
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struct cx23885_dev *dev = port->dev;
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u32 reg;
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dprintk(1, "%s()\n", __func__);
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/* Stop interrupts and DMA */
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cx_clear(port->reg_ts_int_msk, port->ts_int_msk_val);
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cx_clear(port->reg_dma_ctl, port->dma_ctl_val);
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if (cx23885_boards[dev->board].portb & CX23885_MPEG_ENCODER) {
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reg = cx_read(PAD_CTRL);
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/* Set TS1_OE */
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reg = reg | 0x1;
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/* clear TS1_SOP_OE and TS1_OE_HI */
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reg = reg & ~0xa;
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cx_write(PAD_CTRL, reg);
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cx_write(port->reg_src_sel, 0);
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cx_write(port->reg_gen_ctrl, 8);
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}
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if (cx23885_boards[dev->board].portb == CX23885_MPEG_ENCODER)
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cx23885_av_clk(dev, 0);
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return 0;
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}
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@ -1525,7 +1567,8 @@ static int __devinit cx23885_initdev(struct pci_dev *pci_dev,
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printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, "
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"latency: %d, mmio: 0x%llx\n", dev->name,
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pci_name(pci_dev), dev->pci_rev, pci_dev->irq,
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dev->pci_lat, (unsigned long long)pci_resource_start(pci_dev,0));
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dev->pci_lat,
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(unsigned long long)pci_resource_start(pci_dev, 0));
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pci_set_master(pci_dev);
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if (!pci_dma_supported(pci_dev, 0xffffffff)) {
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@ -423,6 +423,29 @@ int cx23885_i2c_unregister(struct cx23885_i2c *bus)
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return 0;
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}
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void cx23885_av_clk(struct cx23885_dev *dev, int enable)
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{
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/* write 0 to bus 2 addr 0x144 via i2x_xfer() */
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char buffer[3];
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struct i2c_msg msg;
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dprintk(1, "%s(enabled = %d)\n", __func__, enable);
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/* Register 0x144 */
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buffer[0] = 0x01;
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buffer[1] = 0x44;
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if (enable == 1)
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buffer[2] = 0x05;
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else
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buffer[2] = 0x00;
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msg.addr = 0x44;
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msg.flags = I2C_M_TEN;
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msg.len = 3;
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msg.buf = buffer;
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i2c_xfer(&dev->i2c_bus[2].i2c_adap, &msg, 1);
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}
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/* ----------------------------------------------------------------------- */
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/*
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@ -446,6 +446,7 @@ extern int cx23885_i2c_register(struct cx23885_i2c *bus);
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extern int cx23885_i2c_unregister(struct cx23885_i2c *bus);
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extern void cx23885_call_i2c_clients(struct cx23885_i2c *bus, unsigned int cmd,
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void *arg);
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extern void cx23885_av_clk(struct cx23885_dev *dev, int enable);
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/* ----------------------------------------------------------- */
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/* cx23885-417.c */
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