RISC-V updates for v5.3-rc2
Four minor RISC-V-related changes for v5.3-rc2: - Add support for the new clone3 syscall for RV64, relying on the generic support - Add DT data for the gigabit Ethernet controller on the SiFive FU540 and the HiFive Unleashed board - Update MAINTAINERS to add me to the arch/riscv maintainers' list - Add support for PCIe message-signaled interrupts by reusing the generic header file -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEElRDoIDdEz9/svf2Kx4+xDQu9KksFAl04v2IACgkQx4+xDQu9 KktWvxAAmqn1DFXbRMvvBVD81IiEax5hApc2esLqwiuxuk4QX2KvELBGY8/jbWOQ nLt/J8AV64Xjg4aHL2vl9/8WTjEoJty63udK2jWS/8wIAgirO3bAntC0y8su3LQK MILOmKOzZG+1c2q852SydBFWCWhHD/emccIuxjIjMNeq+szDC2IArRkRP9njorPB 6Ivx04tY/RNqY6qlssnsVzlG/EfVUq5K3CQVMNSrzXueQy3fM9OXy4ZGLwxYKCao a4Wyzh4s6seuEHiAKxtEW04vg58NJhv5xDjrx0phUsZFlTMgYDSn5UTCQAAa2cuM rKzeFbn/WbDteMYJsnh6e5l0TGyiPNxMofKB5etFswhS4ZLN+xgBYtUj90LSUbbW rwuauEuQLYCnnizpQsWrTi27XikT3evy2CHOO3aMVbMWfS7cCWNoyDR+NQWkBajD uLrq0c/rxjkfFkOhvUbnhvuMvCPztvpoHlpjF+5g44sdC5y0kZyTMpSKzkmnI7nr Vokg9O5o6pJB82xomahEew+eBMtSEAzEP6iYlL/GKbN2G2FQMMW8rCGxa64Foq8B R0MK1+tItFKyjgf7Cub81iOJTG1KuigosWJTKZO2pfYVMAURi9aBfQs/ebTdS0j2 oXWPatbu46Wc04vdb3rf6945Fie+MgF7HPZeyXXtYwvUHikWjXc= =z0UB -----END PGP SIGNATURE----- Merge tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V updates from Paul Walmsley: "Four minor RISC-V-related changes: - Add support for the new clone3 syscall for RV64, relying on the generic support - Add DT data for the gigabit Ethernet controller on the SiFive FU540 and the HiFive Unleashed board - Update MAINTAINERS to add me to the arch/riscv maintainers' list - Add support for PCIe message-signaled interrupts by reusing the generic header file" * tag 'riscv/for-v5.3-rc2' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: dts: Add DT node for SiFive FU540 Ethernet controller driver riscv: include generic support for MSI irqdomains MAINTAINERS: Add Paul as a RISC-V maintainer riscv: enable sys_clone3 syscall for rv64
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commit
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@ -13725,6 +13725,7 @@ F: drivers/mtd/nand/raw/r852.c
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F: drivers/mtd/nand/raw/r852.h
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RISC-V ARCHITECTURE
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M: Paul Walmsley <paul.walmsley@sifive.com>
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M: Palmer Dabbelt <palmer@sifive.com>
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M: Albert Ou <aou@eecs.berkeley.edu>
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L: linux-riscv@lists.infradead.org
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@ -217,5 +217,20 @@
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#size-cells = <0>;
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status = "disabled";
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};
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eth0: ethernet@10090000 {
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compatible = "sifive,fu540-c000-gem";
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interrupt-parent = <&plic0>;
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interrupts = <53>;
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reg = <0x0 0x10090000 0x0 0x2000
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0x0 0x100a0000 0x0 0x1000>;
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local-mac-address = [00 00 00 00 00 00];
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clock-names = "pclk", "hclk";
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clocks = <&prci PRCI_CLK_GEMGXLPLL>,
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<&prci PRCI_CLK_GEMGXLPLL>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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};
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};
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@ -76,3 +76,12 @@
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disable-wp;
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};
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};
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ð0 {
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status = "okay";
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phy-mode = "gmii";
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phy-handle = <&phy0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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@ -22,6 +22,7 @@ generic-y += kvm_para.h
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generic-y += local.h
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generic-y += local64.h
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generic-y += mm-arch-hooks.h
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generic-y += msi.h
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generic-y += percpu.h
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generic-y += preempt.h
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generic-y += sections.h
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@ -18,6 +18,7 @@
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#ifdef __LP64__
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#define __ARCH_WANT_NEW_STAT
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#define __ARCH_WANT_SET_GET_RLIMIT
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#define __ARCH_WANT_SYS_CLONE3
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#endif /* __LP64__ */
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#include <asm-generic/unistd.h>
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