drivers/misc/ad525x_dpot.c: new features
Add support for AD5270, AD5271, AD5272, AD5274 digital potentiometers. Add 20-TP feature for AD5291 and AD5292 parts, and update feature list. AD5291 rdac read back must be shifted by two. Signed-off-by: Michael Hennerich <michael.hennerich@analog.com> Cc: Mike Frysinger <vapier@gentoo.org> Cc: Chris Verges <chrisv@cyberswitching.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
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@ -24,7 +24,8 @@ config AD525X_DPOT
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AD5260, AD5262, AD5263, AD5290, AD5291, AD5292, AD5293,
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AD7376, AD8400, AD8402, AD8403, ADN2850, AD5241, AD5242,
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AD5243, AD5245, AD5246, AD5247, AD5248, AD5280, AD5282,
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ADN2860, AD5273, AD5171, AD5170, AD5172, AD5173
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ADN2860, AD5273, AD5171, AD5170, AD5172, AD5173, AD5270,
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AD5271, AD5272, AD5274
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digital potentiometer chips.
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See Documentation/misc-devices/ad525x_dpot.txt for the
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@ -102,6 +102,8 @@ static const struct i2c_device_id ad_dpot_id[] = {
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{"ad5170", AD5170_ID},
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{"ad5172", AD5172_ID},
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{"ad5173", AD5173_ID},
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{"ad5272", AD5272_ID},
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{"ad5274", AD5274_ID},
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{}
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};
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MODULE_DEVICE_TABLE(i2c, ad_dpot_id);
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@ -38,6 +38,8 @@ static const struct ad_dpot_id ad_dpot_spi_devlist[] = {
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{.name = "ad8402", .devid = AD8402_ID},
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{.name = "ad8403", .devid = AD8403_ID},
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{.name = "adn2850", .devid = ADN2850_ID},
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{.name = "ad5270", .devid = AD5270_ID},
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{.name = "ad5271", .devid = AD5271_ID},
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{}
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};
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@ -29,9 +29,9 @@
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* AD5262 2 256 20, 50, 200
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* AD5263 4 256 20, 50, 200
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* AD5290 1 256 10, 50, 100
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* AD5291 1 256 20
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* AD5292 1 1024 20
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* AD5293 1 1024 20
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* AD5291 1 256 20, 50, 100 (20-TP)
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* AD5292 1 1024 20, 50, 100 (20-TP)
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* AD5293 1 1024 20, 50, 100
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* AD7376 1 128 10, 50, 100, 1M
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* AD8400 1 256 1, 10, 50, 100
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* AD8402 2 256 1, 10, 50, 100
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@ -52,6 +52,10 @@
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* AD5170 1 256 2.5, 10, 50, 100 (OTP)
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* AD5172 2 256 2.5, 10, 50, 100 (OTP)
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* AD5173 2 256 2.5, 10, 50, 100 (OTP)
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* AD5270 1 1024 20, 50, 100 (50-TP)
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* AD5271 1 256 20, 50, 100 (50-TP)
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* AD5272 1 1024 20, 50, 100 (50-TP)
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* AD5274 1 256 20, 50, 100 (50-TP)
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*
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* See Documentation/misc-devices/ad525x_dpot.txt for more info.
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*
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@ -126,18 +130,38 @@ static inline int dpot_write_r8d16(struct dpot_data *dpot, u8 reg, u16 val)
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static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
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{
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unsigned ctrl = 0;
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int value;
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if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
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if (dpot->feat & F_RDACS_WONLY)
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return dpot->rdac_cache[reg & DPOT_RDAC_MASK];
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if (dpot->uid == DPOT_UID(AD5291_ID) ||
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dpot->uid == DPOT_UID(AD5292_ID) ||
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dpot->uid == DPOT_UID(AD5293_ID))
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return dpot_read_r8d8(dpot,
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dpot->uid == DPOT_UID(AD5293_ID)) {
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value = dpot_read_r8d8(dpot,
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DPOT_AD5291_READ_RDAC << 2);
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if (dpot->uid == DPOT_UID(AD5291_ID))
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value = value >> 2;
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return value;
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} else if (dpot->uid == DPOT_UID(AD5270_ID) ||
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dpot->uid == DPOT_UID(AD5271_ID)) {
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value = dpot_read_r8d8(dpot,
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DPOT_AD5270_1_2_4_READ_RDAC << 2);
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if (value < 0)
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return value;
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if (dpot->uid == DPOT_UID(AD5271_ID))
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value = value >> 2;
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return value;
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}
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ctrl = DPOT_SPI_READ_RDAC;
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} else if (reg & DPOT_ADDR_EEPROM) {
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ctrl = DPOT_SPI_READ_EEPROM;
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@ -153,6 +177,7 @@ static s32 dpot_read_spi(struct dpot_data *dpot, u8 reg)
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static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
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{
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int value;
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unsigned ctrl = 0;
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switch (dpot->uid) {
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case DPOT_UID(AD5246_ID):
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@ -177,6 +202,25 @@ static s32 dpot_read_i2c(struct dpot_data *dpot, u8 reg)
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ctrl = ((reg & DPOT_RDAC_MASK) == DPOT_RDAC0) ?
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0 : DPOT_AD5172_3_A0;
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return dpot_read_r8d8(dpot, ctrl);
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case DPOT_UID(AD5272_ID):
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case DPOT_UID(AD5274_ID):
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dpot_write_r8d8(dpot,
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(DPOT_AD5270_1_2_4_READ_RDAC << 2), 0);
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value = dpot_read_r8d16(dpot,
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DPOT_AD5270_1_2_4_RDAC << 2);
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if (value < 0)
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return value;
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/*
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* AD5272/AD5274 returns high byte first, however
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* underling smbus expects low byte first.
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*/
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value = swab16(value);
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if (dpot->uid == DPOT_UID(AD5271_ID))
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value = value >> 2;
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return value;
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default:
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if ((reg & DPOT_REG_TOL) || (dpot->max_pos > 256))
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return dpot_read_r8d16(dpot, (reg & 0xF8) |
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@ -198,7 +242,7 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
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{
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unsigned val = 0;
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if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD))) {
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if (!(reg & (DPOT_ADDR_EEPROM | DPOT_ADDR_CMD | DPOT_ADDR_OTP))) {
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if (dpot->feat & F_RDACS_WONLY)
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dpot->rdac_cache[reg & DPOT_RDAC_MASK] = value;
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@ -219,11 +263,30 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
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} else {
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if (dpot->uid == DPOT_UID(AD5291_ID) ||
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dpot->uid == DPOT_UID(AD5292_ID) ||
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dpot->uid == DPOT_UID(AD5293_ID))
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dpot->uid == DPOT_UID(AD5293_ID)) {
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dpot_write_r8d8(dpot, DPOT_AD5291_CTRLREG << 2,
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DPOT_AD5291_UNLOCK_CMD);
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if (dpot->uid == DPOT_UID(AD5291_ID))
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value = value << 2;
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return dpot_write_r8d8(dpot,
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(DPOT_AD5291_RDAC << 2) |
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(value >> 8), value & 0xFF);
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} else if (dpot->uid == DPOT_UID(AD5270_ID) ||
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dpot->uid == DPOT_UID(AD5271_ID)) {
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dpot_write_r8d8(dpot,
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DPOT_AD5270_1_2_4_CTRLREG << 2,
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DPOT_AD5270_1_2_4_UNLOCK_CMD);
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if (dpot->uid == DPOT_UID(AD5271_ID))
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value = value << 2;
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return dpot_write_r8d8(dpot,
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(DPOT_AD5270_1_2_4_RDAC << 2) |
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(value >> 8), value & 0xFF);
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}
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val = DPOT_SPI_RDAC | (reg & DPOT_RDAC_MASK);
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}
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} else if (reg & DPOT_ADDR_EEPROM) {
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@ -243,6 +306,16 @@ static s32 dpot_write_spi(struct dpot_data *dpot, u8 reg, u16 value)
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val = DPOT_SPI_INC_ALL;
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break;
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}
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} else if (reg & DPOT_ADDR_OTP) {
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if (dpot->uid == DPOT_UID(AD5291_ID) ||
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dpot->uid == DPOT_UID(AD5292_ID)) {
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return dpot_write_r8d8(dpot,
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DPOT_AD5291_STORE_XTPM << 2, 0);
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} else if (dpot->uid == DPOT_UID(AD5270_ID) ||
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dpot->uid == DPOT_UID(AD5271_ID)) {
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return dpot_write_r8d8(dpot,
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DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
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}
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} else
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BUG();
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@ -303,10 +376,25 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
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tmp = dpot_read_r8d16(dpot, tmp);
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if (tmp >> 14) /* Ready to Program? */
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return -EFAULT;
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ctrl = DPOT_AD5270_2_3_FUSE;
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ctrl = DPOT_AD5170_2_3_FUSE;
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}
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return dpot_write_r8d8(dpot, ctrl, value);
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break;
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case DPOT_UID(AD5272_ID):
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case DPOT_UID(AD5274_ID):
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dpot_write_r8d8(dpot, DPOT_AD5270_1_2_4_CTRLREG << 2,
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DPOT_AD5270_1_2_4_UNLOCK_CMD);
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if (reg & DPOT_ADDR_OTP)
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return dpot_write_r8d8(dpot,
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DPOT_AD5270_1_2_4_STORE_XTPM << 2, 0);
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if (dpot->uid == DPOT_UID(AD5274_ID))
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value = value << 2;
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return dpot_write_r8d8(dpot, (DPOT_AD5270_1_2_4_RDAC << 2) |
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(value >> 8), value & 0xFF);
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break;
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default:
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if (reg & DPOT_ADDR_CMD)
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return dpot_write_d8(dpot, reg);
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@ -320,7 +408,6 @@ static s32 dpot_write_i2c(struct dpot_data *dpot, u8 reg, u16 value)
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}
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}
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static s32 dpot_write(struct dpot_data *dpot, u8 reg, u16 value)
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{
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if (dpot->feat & F_SPI)
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@ -93,8 +93,10 @@ enum dpot_devid {
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BRDAC0 | BRDAC1 | BRDAC2 | BRDAC3, 8, 23),
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AD5290_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
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BRDAC0, 8, 24),
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AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 8, 25),
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AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 26),
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AD5291_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
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BRDAC0, 8, 25),
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AD5292_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT | F_CMD_OTP,
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BRDAC0, 10, 26),
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AD5293_ID = DPOT_CONF(F_RDACS_RW | F_SPI_16BIT, BRDAC0, 10, 27),
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AD7376_ID = DPOT_CONF(F_RDACS_WONLY | F_AD_APPDATA | F_SPI_8BIT,
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BRDAC0, 7, 28),
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@ -122,6 +124,12 @@ enum dpot_devid {
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AD5170_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 45),
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AD5172_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 46),
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AD5173_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0 | BRDAC1, 8, 47),
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AD5270_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
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BRDAC0, 10, 48),
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AD5271_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP | F_SPI_16BIT,
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BRDAC0, 8, 49),
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AD5272_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 10, 50),
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AD5274_ID = DPOT_CONF(F_RDACS_RW | F_CMD_OTP, BRDAC0, 8, 51),
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};
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#define DPOT_RDAC0 0
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/* AD5291/2/3 use special commands */
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#define DPOT_AD5291_RDAC 0x01
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#define DPOT_AD5291_READ_RDAC 0x02
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#define DPOT_AD5291_STORE_XTPM 0x03
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#define DPOT_AD5291_CTRLREG 0x06
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#define DPOT_AD5291_UNLOCK_CMD 0x03
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#define DPOT_AD5291_RDAC_AB 0x80
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/* AD5270/1/2/4 use special commands */
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#define DPOT_AD5270_1_2_4_RDAC 0x01
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#define DPOT_AD5270_1_2_4_READ_RDAC 0x02
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#define DPOT_AD5270_1_2_4_STORE_XTPM 0x03
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#define DPOT_AD5270_1_2_4_CTRLREG 0x07
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#define DPOT_AD5270_1_2_4_UNLOCK_CMD 0x03
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#define DPOT_AD5282_RDAC_AB 0x80
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#define DPOT_AD5273_FUSE 0x80
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#define DPOT_AD5170_2_3_FUSE 0x20
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#define DPOT_AD5170_2_3_OW 0x08
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