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tools/testing/cxl: Fix root port to host bridge assignment 

Mocked root-ports are meant to be round-robin assigned to host-bridges.

Fixes: 67dcdd4d3b ("tools/testing/cxl: Introduce a mocked-up CXL port hierarchy")
Link: https://lore.kernel.org/r/164298431629.3018233.14004377108116384485.stgit@dwillia2-desk3.amr.corp.intel.com
Signed-off-by: Dan Williams <dan.j.williams@intel.com>
This commit is contained in:
Dan Williams 2022-01-23 16:31:56 -08:00
parent f246abd67f
commit a4a0ce242f
1 changed files with 1 additions and 1 deletions
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2
tools/testing/cxl/test/cxl.c
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@ -558,7 +558,7 @@ static __init int cxl_test_init(void)
for (i = 0; i < ARRAY_SIZE(cxl_root_port); i++) {
struct platform_device *bridge =
cxl_host_bridge[i / NR_CXL_ROOT_PORTS];
cxl_host_bridge[i % ARRAY_SIZE(cxl_host_bridge)];
struct platform_device *pdev;
pdev = platform_device_alloc("cxl_root_port", i);