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IA64: Slim down __clear_bit_unlock 

__clear_bit_unlock does not need to perform atomic operations on the
variable.  Avoid a cmpxchg and simply do a store with release semantics.
Add a barrier to be safe that the compiler does not do funky things.

Tony: Use intrinsic rather than inline assembler

Signed-off-by: Christoph Lameter <clameter@sgi.com>
Acked-by: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Christoph Lameter 2007-12-18 16:22:46 -08:00 committed by Tony Luck
parent c63a119036
commit a3ebdb6c42
3 changed files with 22 additions and 3 deletions
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17
include/asm-ia64/bitops.h
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@ -124,10 +124,21 @@ clear_bit_unlock (int nr, volatile void *addr)
/** /**
* __clear_bit_unlock - Non-atomically clear a bit with release * __clear_bit_unlock - Non-atomically clear a bit with release
* *
* This is like clear_bit_unlock, but the implementation may use a non-atomic * This is like clear_bit_unlock, but the implementation uses a store
* store (this one uses an atomic, however). * with release semantics. See also __raw_spin_unlock().
*/ */
#define __clear_bit_unlock clear_bit_unlock static __inline__ void
__clear_bit_unlock(int nr, volatile void *addr)
{
__u32 mask, new;
volatile __u32 *m;
m = (volatile __u32 *)addr + (nr >> 5);
mask = ~(1 << (nr & 31));
new = *m & mask;
barrier();
ia64_st4_rel_nta(m, new);
}
/** /**
* __clear_bit - Clears a bit in memory (non-atomic version) * __clear_bit - Clears a bit in memory (non-atomic version)

5
include/asm-ia64/gcc_intrin.h
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@ -191,6 +191,11 @@ register unsigned long ia64_r13 asm ("r13") __attribute_used__;
asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \ asm volatile ("ldf.fill %0=[%1]" :"=f"(__f__): "r"(x)); \
}) })
#define ia64_st4_rel_nta(m, val) \
({ \
asm volatile ("st4.rel.nta [%0] = %1\n\t" :: "r"(m), "r"(val)); \
})
#define ia64_stfs(x, regnum) \ #define ia64_stfs(x, regnum) \
({ \ ({ \
register double __f__ asm ("f"#regnum); \ register double __f__ asm ("f"#regnum); \

3
include/asm-ia64/intel_intrin.h
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@ -110,6 +110,9 @@
#define ia64_st4_rel __st4_rel #define ia64_st4_rel __st4_rel
#define ia64_st8_rel __st8_rel #define ia64_st8_rel __st8_rel
/* FIXME: need st4.rel.nta intrinsic */
#define ia64_st4_rel_nta __st4_rel
#define ia64_ld1_acq __ld1_acq #define ia64_ld1_acq __ld1_acq
#define ia64_ld2_acq __ld2_acq #define ia64_ld2_acq __ld2_acq
#define ia64_ld4_acq __ld4_acq #define ia64_ld4_acq __ld4_acq